STM32W108C8 STMicroelectronics, STM32W108C8 Datasheet - Page 48

• Manufacturer Part Number: STM32W108C8
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with 64-Kybte Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108C8

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch and breakpoint; data watchpoint and trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

System modules
Table 18.
Table 19.
47/215
31
15
31
15
30
14
30
14
Sleep timer interrupt mask register (INT_SLEEPTMRCFG)
Address:
Reset value:
Sleep timer interrupt mask register (INT_SLEEPTMRCFG)
Sleep timer clock source enables (SLEEPTMR_CLKEN)
This timer controls the low power clock gated modes.
Clearing CLKRC_EN before executing WFE with SLEEPDEEP bit set in the NVIC System
control register causes DEEP_SLEEP2 to be entered. Setting this bit causes
DEEP_SLEEP1 to be entered.
Address:
Reset value:
Sleep timer clock source enables (SLEEPTMR_CLKEN)
Bit 2 INT_ SLEEPTMR CMPB: Sleep timer compare B
Bit 1 INT_SLEEPTMRCMPA: Sleep timer compare A
Bit 0 INT_SLEEPTMRWRAP: Sleep timer overflow
Bit 2 INT_ SLEEPTMR CMPB: Sleep timer compare B
Bit 1 INT_SLEEPTMRCMPA: Sleep timer compare A
Bit 0 INT_SLEEPTMRWRAP: Sleep timer overflow
29
13
29
13
Note: Bits are cleared when set to ‘1’.
Note: Bits are cleared when set to ‘1’.
Note: Bits are cleared when set to ‘1’.
28
12
28
12
27
11
27
11
0x4000 A054
0x0000 0000
0x4000 0008
0x0000 0002
26
10
26
10
25
Reserved
9
Reserved
25
9
r
Doc ID 018587 Rev 2
r
24
8
24
8
Reserved
Reserved
23
7
23
7
22
6
22
6
21
5
21
5
20
4
20
4
19
3
19
3
18
2
SLEEP
CMPB
INT_
TMR
18
rw
2
STM32W108C8
CLK10K
SLEEP
TMR_
EN
17
rw
1
SLEEP
CMPA
INT_
TMR
17
rw
1
CLK32K
SLEEP
TMR_
SLEEP
WRAP
EN
16
rw
INT_
TMR
0
16
rw
0