ST72521AR9 STMicroelectronics, ST72521AR9 Datasheet - Page 129

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ST72521AR9

Manufacturer Part Number
ST72521AR9
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72521AR9

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
10.8 CONTROLLER AREA NETWORK (CAN)
10.8.1 Introduction
This peripheral is designed to support serial data
exchanges using a multi-master contention based
priority scheme as described in CAN specification
Rev. 2.0 part A. It can also be connected to a 2.0 B
network without problems, since extended frames
Figure 68. CAN Block Diagram
RX
TX
10 Bytes
Buffer 1
TX/RX
BTL
10 Bytes
Buffer 2
TX/RX
BCDL
CAN 2.0B passive Core
EML
10 Bytes
Buffer 3
TX/RX
SHREG
ST7 Internal Bus
ST7 Interface
4 Bytes
Filter 0
are checked for correctness and acknowledged
accordingly although such frames cannot be trans-
mitted nor received. The same applies to overload
frames which are recognized but never initiated.
CRC
ID
4 Bytes
Filter 1
ID
ST72F521, ST72521B
BRPR
RECR
TECR
PSR
CSR
BTR
ICR
ISR
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