ST72521AR9 STMicroelectronics, ST72521AR9 Datasheet - Page 177

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ST72521AR9

Manufacturer Part Number
ST72521AR9
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72521AR9

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
CLOCK CHARACTERISTICS (Cont’d)
12.5.5 PLL Characteristics
Note:
1. Data characterized but not tested.
The user must take the PLL jitter into account in the application (for example in serial communication or
sampling of high frequency signals). The PLL jitter is a periodic effect, which is integrated over several
CPU cycles. Therefore the longer the period of the application signal, the less it will be impacted by the
PLL jitter.
Figure 94
cies of less than 125KHz, the jitter is negligible.
Figure 94. Integrated PLL Jitter vs signal frequency
Note 1: Measurement conditions: f
f
∆ f
OSC
Symbol
CPU
+/-Jitter (%)
/ f
1.2
0.8
0.6
0.4
0.2
CPU
1
0
shows the PLL jitter integrated on application signals in the range 125kHz to 4MHz. At frequen-
4 MHz
PLL input frequency range
Instantaneous PLL jitter
2 MHz
Parameter
Application Frequency
1 MHz 500 kHz 250 kHz 125 kHz
1)
CPU
= 8MHz.
FLASH typ
ROM max
ROM typ
ROM device,
f
Flash device,
f
Flash device,
f
OSC
OSC
OSC
= 4 MHz.
= 4 MHz.
= 2 MHz.
Conditions
1
Min
2
ST72F521, ST72521B
Typ
0.7
1.0
2.5
Max
2.5
4.0
4
2
177/215
MHz
Unit
%

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