ST72521AR9 STMicroelectronics, ST72521AR9 Datasheet - Page 139

• Manufacturer Part Number: ST72521AR9
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72521AR9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

CONTROLLER AREA NETWORK (Cont’d)
BAUD RATE PRESCALER REGISTER (BRPR)
Read/Write in Standby mode
Reset Value: 00h
RJW[1:0] determine the maximum number of time
quanta by which a bit period may be shortened or
lengthened to achieve resynchronization.
t
BRP[5:0] determine the CAN system clock cycle
time or time quanta which is used to build up the in-
dividual bit timing.
t
Where t
The resulting baud rate can be computed by the for-
mula:
Note: Writing to this register is allowed only in
Standby mode to prevent any accidental CAN pro-
tocol violation through programming errors.
RJW
CAN
RJW1 RJW0 BRP5
BR
7
= t
= t
=
CPU
CAN
CPU
--------------------------------------------------------------------------------------------------- -
t
CPU
* (BRP + 1)
* (RJW + 1)
= time period of the CPU clock.
×
(
BRP
BRP4
+
1
BRP3
)
1
×
(
BS1
BRP2
+
BS2
BRP1
+
BRP0
3
)
0
BIT TIMING REGISTER (BTR)
Read/Write in Standby mode
Reset Value: 23h
BS2[2:0] determine the length of Bit Segment 2.
t
BS1[3:0] determine the length of Bit Segment 1.
t
Note: Writing to this register is allowed only in
Standby mode to prevent any accidental CAN pro-
tocol violation through programming errors.
PAGE SELECTION REGISTER (PSR)
Read/Write
Reset Value: 00h
PAGE[2:0] determine which buffer or filter page is
mapped at addresses 0010h to 001Fh.
BS2
BS1
7
0
7
0
PAGE2
= t
= t
0
0
0
0
1
1
1
1
CAN
CAN
BS22
0
* (BS2 + 1)
* (BS1 + 1)
BS21
0
PAGE1
0
0
1
1
0
0
1
1
BS20
0
ST72F521, ST72521B
BS13
0
PAGE0
0
1
0
1
0
1
0
1
PAGE
BS12
2
PAGE
BS11
Page Title
Diagnosis
Reserved
Reserved
Reserved
1
Buffer 1
Buffer 2
Buffer 3
Filters
139/215
PAGE
BS10
0
0
0