ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 103

• Manufacturer Part Number: ST7232AK2-Auto
• Description: 8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST7232AK2-Auto

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: halt, active halt, wait and slow
• Main Clock Controller With: real time base, beep and clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST7232Axx-Auto
10.4
10.4.1
10.4.2
Note:
10.4.3
General description
Serial peripheral interface (SPI)
Introduction
The serial peripheral interface (SPI) allows full-duplex, synchronous, serial communication
with external devices. An SPI system may consist of a master and one or more slaves
however the SPI interface can not be a master in a multi-master system.
Main features
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In slave mode, continuous transmission is not possible at maximum frequency due to the
software overhead for clearing status flags and to initiate the next transmission sequence.
Figure 46
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The SPI is connected to external devices through 4 pins:
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Full duplex synchronous transfers (on 3 lines)
Simplex synchronous transfers (on 2 lines)
Master or slave operation
Six master mode frequencies (f
f
SS management by software or hardware
Programmable clock polarity and phase
End of transfer interrupt flag.
Write collision, master mode fault and overrun flags
SPI control register (SPICR)
SPI control/status register (SPICSR)
SPI data register (SPIDR)
MISO: master in/slave out data
MOSI: master out / slave in data
SCK: serial clock out by SPI masters and input by SPI slaves
SS: Slave select:
This input signal acts as a ‘chip select’ to let the SPI master communicate with slaves
individually and to avoid contention on the data lines. Slave SS inputs can be driven by
standard I/O ports on the master MCU.
CPU
/2 max. slave mode frequency (see note below)
shows the serial peripheral interface (SPI) block diagram. There are 3 registers:
CPU
/4 max.)
On-chip peripherals
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