ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 86

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ST7LITE49M

Manufacturer Part Number
ST7LITE49M
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49M

4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10k write/erase cycles guaranteed Data retention
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
A/d Converter
10 input channels

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Figure 46. Input capture timing diagram
Long range input capture
Pulses that last more than 8 µs can be measured with an accuracy of 4 µs if f
MHz in the following conditions:
This configuration allows to cascade the Lite timer and the 12-bit AT4 timer to get a 20-bit
input capture value. Refer to
Figure 47. Long range input capture block diagram
COUNTER1
ICF FLAG
f
ATIC PIN
COUNTER
The 12-bit AT4 timer is clocked by the Lite timer (RTC pulse: CK[1:0] = 01 in the ATCSR
register)
The ICS bit in the ATCSR2 register is set so that the LTIC pin is used to trigger the AT4
timer capture.
The signal to be captured is connected to LTIC pin
Input Capture registers LTICR, ATICRH and ATICRL are read
ATIC
LTIC
01h
ICS
1
0
02h
xxh
f
LTIMER
OFF
f
cpu
f
OSC/32
03h
Figure
LTICR
Doc ID 13562 Rev 3
CNTR1
ATR1
ATICR
04h
12-bit Input Capture register
47.
8-bit Input Capture register
12-bit AutoReload register
8-bit Timebase Counter1
12-bit Upcounter1
05h
INTERRUPT
06h
12-bit ARTIMER
LITE TIMER
07h
04h
08h
ATICR READ
8 LSB bits
12 MSB bits
09h
OSC
0Ah
ST7LITE49M
09h
20
cascaded
bits
equals 8
INTERRUPT
t

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