ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 172

• Manufacturer Part Number: ST72361AR9-Auto
• Description: 8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
• Manufacturer: STMicroelectronics

Specifications of ST72361AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

LINSCI serial communication interface (LIN master/slave)
15.8.6
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Table 64.
Bits 2:0 = SCR[2:0] SCI Receiver rate divider.
These 3 bits, in conjunction with the SCP[1:0] bits define the total division applied to the bus
clock to yield the receive rate clock in conventional Baud Rate Generator mode.
Table 65.
Extended receive prescaler division register (SCIERPR)
Read/ write
Reset value: 0000 0000 (00h)
Bits 7:0 = ERPR[7:0] 8-bit Extended Receive Prescaler Register.
The extended baud rate generator is activated when a value other than 00h is stored in this
register. The clock frequency from the 16 divider (see
factor set in the SCIERPR register (in the range 1 to 255).
The extended baud rate generator is not active after a reset.
ERPR7
7
RR dividing factor
TR dividing factor
Transmitter rate divider
Receiver rate divider
ERPR6
128
128
16
32
64
16
32
64
1
2
4
8
ERPR5
Doc ID 12468 Rev 3
ERPR4
SCR2
SCT2
1
0
1
ERPR3
Figure
ERPR2
79) is divided by the binary
SCR1
SCT1
0
1
0
1
0
1
ERPR1
ST72361xx-Auto
SCR0
SCT0
0
1
0
1
0
1
0
1
0
1
0
1
ERPR0
0