ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 59

• Manufacturer Part Number: ST72361AR9-Auto
• Description: 8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
• Manufacturer: STMicroelectronics

Specifications of ST72361AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72361xx-Auto
Note:
Table 19.
These 2 bits can be written only when I1 and I0 of the CC register are both set to 1 (level 3).
Bits 1:0 = IS0[1:0] ei0 sensitivity
The interrupt sensitivity, defined using the IS0[1:0] bits, is applied to the ei0 external
interrupts:
Table 20.
These 2 bits can be written only when I1 and I0 of the CC register are both set to 1 (level 3).
External Interrupt Control Register 1 (EICR1)
Read/Write
Reset value: 0000 0000 (00h)
BIts 7:2 = Reserved
Bit 1 = TLIS Top Level Interrupt sensitivity
This bit configures the TLI edge sensitivity. It can be set and cleared by software only when
TLIE bit is cleared.
Bit 0 = TLIE Top Level Interrupt enable
This bit allows to enable or disable the TLI capability on the dedicated pin. It is set and
cleared by software.
A parasitic interrupt can be generated when clearing the TLIE bit.
In some packages, the TLI pin is not available. In this case, the TLIE bit must be kept low to
avoid parasitic TLI interrupts.
IS11
IS01
1
0
1
0: Falling edge
1: Rising edge
0: TLI disabled
1: TLI enabled
7
0
Interrupt sensitivity - ei1
Interrupt sensitivity - ei0
IS10
IS00
0
1
0
1
0
1
0
Falling edge only
Rising and falling edge
Falling edge and low level
Rising edge only
Falling edge only
Rising and falling edge
0
Doc ID 12468 Rev 3
0
External interrupt sensitivity
External interrupt sensitivity
0
0
TLIS
Interrupts
TLIE
0
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