ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 186

• Manufacturer Part Number: ST72361AR9-Auto
• Description: 8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
• Manufacturer: STMicroelectronics

Specifications of ST72361AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

LINSCI serial communication interface (LIN master/slave)
15.10.4
Note:
186/279
Control register 3 (SCICR3)
Read/ write
Reset value: 0000 0000 (00h)
Bit 7 = LDUM LIN Divider Update Method.
This bit is set and cleared by software and is also cleared by hardware (when RDRF = 1). It
is only used in LIN Slave mode. It determines how the LIN Divider can be updated by
software.
If no write to LPR is performed between the setting of LDUM bit and the reception of the
next character, LDIV will be updated with the old value.
After LDUM has been set, it is possible to reset the LDUM bit by software. In this case, LDIV
can be modified by writing into LPR / LPFR registers.
Bits 6:5 = LINE, LSLV LIN Mode Enable Bits.
These bits configure the LIN mode:
Table 66.
The LIN master configuration enables:
The capability to send LIN synch breaks (13 low bits) using the SBK bit in the SCICR2
register.
The LIN slave configuration enables:
●
●
●
●
●
●
LDUM
0: LDIV is updated as soon as LPR is written (if no auto synchronization update occurs
at the same time).
1: LDIV is updated at the next received character (when RDRF = 1) after a write to the
LPR register
The LIN slave baud rate generator. The LIN Divider (LDIV) is then represented by the
LPR and LPFR registers. The LPR and LPFR registers are read/write accessible at the
address of the SCIBRR register and the address of the SCIETPR register
Management of LIN headers.
LIN synch break detection (11-bit dominant).
LIN wake-up method (see LHDM bit) instead of the normal SCI Wake-Up method.
Inhibition of break transmission capability (SBK has no effect)
LIN parity checking (in conjunction with the PCE bit)
7
LINE
0
1
LIN mode configuration
LINE
LSLV
LSLV
x
0
1
Doc ID 12468 Rev 3
LASE
LHDM
LIN mode disabled
LIN Master Mode
LIN Slave Mode
Meaning
LHIE
LHDF
ST72361xx-Auto
LSF
0