ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 93

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ST72361AR9-Auto

Manufacturer Part Number
ST72361AR9-Auto
Description
8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72361AR9-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
ST72361xx-Auto
11.2.5
Note:
Figure 40. Output compare control
Independent PWM signal generation
This mode allows up to four Pulse Width Modulated signals to be generated on the PWMx
output pins with minimum core processing overhead. This function is stopped during HALT
mode.
Each PWMx output signal can be selected independently using the corresponding OEx bit
in the PWM Control register (PWMCR). When this bit is set, the corresponding I/O pin is
configured as output push-pull alternate function.
The PWM signals all have the same frequency which is controlled by the counter period and
the ARTARR register value.
f
When a counter overflow occurs, the PWMx pin level is changed depending on the
corresponding OPx (output polarity) bit in the PWMCR register. When the counter reaches
the value contained in one of the output compare register (OCRx) the corresponding PWMx
pin level is restored.
It should be noted that the reload values will also affect the value and the resolution of the
duty cycle of the PWM output signal. To obtain a signal on a PWMx pin, the contents of the
OCRx register must be greater than the contents of the ARTARR register.
The maximum available resolution for the PWMx duty cycle is:
Resolution = 1 / (256 - ARTARR)
To have the maximum resolution (1/256), the ARTARR register must be 0. With this
maximum resolution, 0% and 100% can be obtained by changing the polarity.
Figure 41. PWM auto-reload timer function
PWM
= f
COUNTER
AUTO-RELOAD
COUNTER
DUTY CYCLE
f
(PWMDCRx)
COUNTER
PWMx
WITH OEx=1
AND OPx=0
REGISTER
REGISTER
WITH OEx=1
AND OPx=1
PWMDCRx
OCRx
(ARTARR)
255
000
/ (256 - ARTARR)
FDh
FEh
Doc ID 12468 Rev 3
FDh
ARTARR=FDh
FFh
FDh
FDh
FEh
FFh
PWM auto-reload timer (ART)
FEh
FDh
FEh
FEh
FFh
t
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