73S1209F Maxim, 73S1209F Datasheet - Page 14

• Manufacturer Part Number: 73S1209F
• Description: The 73S1209F is a self-contained, SoC smart card reader IC that is an ideal solution for serially connected ISO 7816 design
• Manufacturer: Maxim

Internal Data Memory: The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory.
The internal data memory address is always one byte wide and can be accessed by either direct or
indirect addressing. The Special Function Registers occupy the upper 128 bytes. This SFR area is
available only by direct addressing. Indirect addressing accesses the upper 128 bytes of Internal
RAM.
The lower 128 bytes contain working registers and bit-addressable memory. The lower 32 bytes form
four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW) select which
bank is in use. The next 16 bytes form a block of bit-addressable memory space at bit addressees 0x00-
0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect addressing. Table 4
shows the internal data memory map.
External Data Memory: While the 80515 can address up to 64KB of external data memory in the space
from 0x0000 to 0xFFFF, only the memory ranges shown in Figure 2 contain physical memory. The
80515 writes into external data memory when the MPU executes a MOVX @Ri,A or MOVX @DPTR,A
instruction. The MPU reads external data memory by executing a MOVX A,@Ri or MOVX A,@DPTR
instruction.
There are two types of instructions, differing in whether they provide an eight-bit or sixteen-bit indirect
address to the external data RAM.
In the first type (MOVX A,@Ri), the contents of R0 or R1, in the current register bank, provide the eight
lower-ordered bits of address. This method allows the user access to the first 256 bytes of the 2KB of
external data RAM. In the second type of MOVX instruction (MOVX A,@DPTR), the data pointer
generates a sixteen-bit address.
14
Address
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
Direct Addressing
Special Function
Registers (SFRs)
Table 4: Internal Data Memory Map
Byte or bit-addressable area
Register banks R0…R7 (x4)
Byte-addressable area
Indirect Addressing
RAM
Rev. 1.2