PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 163

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PM4328-PI

Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet

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STANDARD PRODUCT
DATASHEET
PMC-2011596
12.7 Using the Per-Channel Serial Controllers
12.7.1 Initialization
12.7.2 Direct Access Mode
12.7.3 Indirect Access Mode
PROPRIETARY AND CONFIDENTIAL
Before the TPSC (RPSC) block can be used, a proper initialization of the internal
registers must be performed to eliminate erroneous control data from being
produced on the block outputs. The output control streams should be disabled
by setting the PCCE bit in the TPSC (RPSC) Configuration Register to logic 0.
Then, all 96 locations of the TPSC (RPSC) must be filled with valid data.
Finally, the output streams can be enabled by setting the PCCE bit in the TPSC
(RPSC) Configuration Register to logic 1.
Direct access mode to the TPSC or RPSC is not used in the TECT3. However,
direct access mode is selected by default whenever the TECT3 is reset. The
IND bit within the TPSC and RPSC Configuration Registers must be set to
logic 1 after a reset is applied.
Indirect access mode is selected by setting the IND bit in the TPSC or RPSC
Configuration Register to logic 1. When using the indirect access mode, the
status of the BUSY indication bit should be polled to determine the status of the
G4=1
G5=1
G6=1
SE=1
FE=1
LV=1
SL=1
LB=1
U1,U2=0
R=0
NmNI=00,01,10,11
ISSUE 1
10<CRC ERROR EVENT £100
100<CRC ERROR EVENT £319
CRC ERROR EVENT £ 320
Severely Errored Framing Event ³ 1(FE shall =0)
Frame Synchronization Bit Error Event ³1
(SE shall=0 )
Line code violation event ³ 1
Slip Event ³ 1
Payload Loopback Activated
Under Study For Synchronization.
Reserved ( Default Value =0)
One second Report Modulo 4 Counter
150
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3

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