PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 46
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PM4328-PI
Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM4328-PI.pdf
(250 pages)
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STANDARD PRODUCT
DATASHEET
PMC-2011596
Pin Name
IFP[12]
IFP[13]
IFP[14]
IFP[15]
IFP[16]
IFP[17]
IFP[18]
IFP[19]
IFP[20]
IFP[21]
IFP[22]
IFP[23]
IFP[24]
IFP[25]
IFP[26]
IFP[27]
IFP[28]
ID[1]
ID[2]
ID[3]
ID[4]
ID[5]
ID[6]
ID[7]
ID[8]
ID[9]
ID[10]
ID[11]
ID[12]
ID[13]
ID[14]
ID[15]
ID[16]
ID[17]
ID[18]
ID[19]
ID[20]
ID[21]
ID[22]
ID[23]
ID[24]
PROPRIETARY AND CONFIDENTIAL
Type
Output AA5
ISSUE 1
Pin
No.
G1
V20
Y22
K20
J19
W4
V1
E1
D9
U19
R22
J22
J20
K1
K2
D8
A9
Y6
AA20
T19
R19
P20
G22
G21
Y2
W2
G4
H2
P21
P22
A12
D12
U2
V4
D11
A11
M19
L19
D10
A10
Function
Channel modes IFP[x] is not used.
In E1 mode only IFP[1:21] is used.
IFP[1] shares a pin with the DS3 system interface
signal RFPO/RMFPO. IFP[20,27,28] shares pins with
the SBI interface signals SDDP, SDPL, SDV5.
Ingress Data (ID[1:28]). Each ID[x] signal contains
the recovered data stream which may have been
passed through the elastic store.
When the Clock Slave ingress modes are active, the
ID[x] stream has passed through the elastic store and
is aligned to the common ingress timing. In this mode
ID[x] is updated on the active edge of CICLK.
When the Clock Master ingress modes are active, ID[x]
is aligned to the receive line timing and is updated on
the active edge of the associated ICLK[x].
In E1 mode only ID[1:21] are used.
ID[1,5,9,13,17,21,25] share pins with the H-MVIP data
signals MVID[1:7]. ID[2,6,10,14,18,22,26] share pins
with the H-MVIP CAS signals CASID[1:7]. ID[1] shares
a pin with the DS3 system interface signal RDATO.
ID[2] shares a pin with the DS3 system interface signal
ROVRHD. ID[15,16,19,20,23,24,27,28] shares pins
with the SBI interface bus SDDATA[7:0].
33
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3
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