PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 210

• Manufacturer Part Number: PM4328-PI
• Description: Framer, T1|E1|T3 Standard Format, 324-BGA
• Manufacturer: PMC-Sierra, Inc.

STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
ISIG[x]
CICLK
Figure 76: T1 Ingress Interface Clock Slave: External Signaling Mode
CIFP
Figure 77: E1 Ingress Interface Clock Slave: External Signaling Mode
The Ingress Interface is programmed for Clock Slave mode by setting the
IMODE[1:0] bits in the T1/E1 Ingress Serial Interface Mode Select register. ID[x]
is timed to the active edge of CICLK, and is frame-aligned to CIFP. CIFP need
not be provided every frame. ID[x] and ISIG[x] may be configured to carry a
parity bit during the first bit of each frame. In External Signaling Mode, ISIG[x] is
active and is aligned as shown.
ID[x]
ISIG[x]
CICLK
CIFP
ID[x]
1 2 3 4 5 6 7 8 F
Channel 24
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
Timeslot 31
A B C D
F-bit or Parity
A B C D
ISSUE 1
1 2 3 4 5 6 7 8
Channel 1
Timeslot 0
A B C D
1 2 3 4 5 6 7 8
Channel 2
197
Timeslot 1
A B C D
A B C
D
1 2 3 4 5 6 7 8 F
Channel 24
1 2 3 4 5 6 7 8
Timeslot 31
A B C D
F-bit or Parity
A B C D
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Channel 1
PM4328 TECT3
Timeslot 0
A B C D
1