ATA5823 ATMEL Corporation, ATA5823 Datasheet - Page 55

• Manufacturer Part Number: ATA5823
• Description: Uhf Ask/fsk Transceiver Ata5823 Ata5824
• Manufacturer: ATMEL Corporation

14.1.4
14.1.5
Figure 14-2. Timing Diagram for Complete Successful Bit-check
4829D–RKE–06/06
(Number of checked bits: 3)
Bit-check Mode
Bit-check Configuration
RX_ACTIVE
Demod_Out
Bit-check
Start-up mode
T
Startup_Sig_Proc
In Bit-check mode the incoming data stream is examined to distinguish between a valid signal
from a corresponding transmitter and signals due to noise. This is done by subsequent time
frame checks where the distance between 2 signal edges are continuously compared to a pro-
grammable time window. The maximum count of this edge to edge test before the transceiver
switches to receiving mode is also programmable.
Assuming a modulation scheme that contains 2 edges per bit, two time frame checks are verify-
ing one bit. This is valid for Manchester, Bi-phase and most other modulation schemes. The
maximum count of bits to be checked can be set to 0, 3, 6 or 9 bits via the variable N
control register 5. This implies 0, 6, 12 and 18 edge to edge checks respectively. If N
set to a higher value, the transceiver is less likely to switch to receiving mode due to noise. In the
presence of a valid transmitter signal, the Bit-check takes less time if N
value. In RX polling mode, the Bit-check time is not dependent on N
present.
According to
its. If the edge to edge time t
Bit-check limit T
T
Figure 14-3. Valid Time Window for Bit-check
Lim_max
, the Bit-check will be terminated and the transceiver switches to sleep mode.
Figure 14-2
Figure
Demod_Out
1/2 bit
Lim_max
14-3, the time window for the Bit-check is defined by two separate time lim-
shows an example where 3 bits are tested successful.
, the check will be continued. If t
1/2 bit
ee
is in between the lower Bit-check limit T
Bit-check mode
1/2 bit
T
Bit-check
T
Bit-check ok
Lim_min
T
1/2 bit
Lim_max
t
ee
1/f
ee
1/2 bit
Signal
is smaller than limit T
ATA5823/ATA5824
1/2 bit
Bit-check
Bit-check
Receiving mode
Lim_min
if no valid signal is
Lim_min
is set to a lower
and the upper
or exceeds
Bit-check
Bit-check
55
in
is