KSZ8862 Micrel Semiconductor, KSZ8862 Datasheet - Page 57

• Manufacturer Part Number: KSZ8862
• Description: 2-port Ethernet Switch With Non-pci Interface And Fiber Support
• Manufacturer: Micrel Semiconductor

Register Map: Switch and MAC/PHY
Do not write to bit values or to registers defined as Reserved. Manipulating reserved bits or registers causes
unpredictable and often fatal results. If the user wants to write to these reserved bits, the user has to read back these
reserved bits (RO or RW) first, then “OR” with the read value of the reserved bits and write back to these reserved bits.
Bit Type Definition
RO = Read only.
RW = Read/Write.
W1C = Write 1 to Clear (writing a one to this bit clears it).
Bank 0-63 Bank Select Register (0x0E): BSR (same location in all Banks)
The bank select register is used to select or to switch between different sets of register banks for I/O access.
There are a total of 64 banks available to select, including the built-in switch engine registers.
Bank 0 Base Address Register (0x00): BAR
This register holds the base address for decoding a device access. Its value is loaded from the external EEPROM (0x0H)
upon a power-on reset if the EEPROM Enable (EEEN) pin is tied to High. Its value can also be modified after reset.
Writing to this register does not store the value into the EEPROM. When the EEEN pin is tied to Low, the default base
address is 0x0300.
Bank 0 QMU RX Flow Control High Watermark Configuration Register (0x04): QRFCR
This register contains the user defined QMU RX Queue high watermark configuration bit as below.
Micrel, Inc.
April 2007
Bit
15-6
5-0
Bit
15-8
7-5
4-0
Bit
15-13
12
11-0
Default Value
0x000
0x00
Default Value
0x03 if EEEN
is Low or, the
value from
EEPROM if
EEEN is High
0x0 if EEEN is
Low or, the
value from
EEPROM if
EEEN is High
0x00
Default Value
0x0
0
0x000
R/W
RO
R/W
R/W
RW
RW
RO
R/W
RO
RW
RO
Description
Reserved
BSA Bank Select Address Bits
BSA bits select the I/O register bank in use.
This register is always accessible regardless of the register bank currently selected.
Notes:
The bank select register can be accessed as a doubleword (32-bit) at offset 0xC, as a word
(16-bit) at offset 0xE, or as a byte (8-bit) at offset 0xE.
A doubleword write to offset 0xC writes to the BANK Select Register but does not write to
registers 0xC and 0xD; it only writes to register 0xE.
Description
BARH Base Address High
These bits are compared against the address on the bus ADDR[15:8] to determine the BASE
for the KSZ8862M registers.
BARL Base Address Low
These bits are compared against the address on the bus ADDR[7:5] to determine the BASE
for the KSZ8862M registers.
Reserved
Description
Reserved
QMU RX Flow Control High Watermark Configuration
0: To select 3 Kbytes, 1: To select 2 Kbytes
Reserved
57
KSZ8862-16/32MQL
M9999-040407-3.0