FIDO1100 Innovasic Semiconductor Inc., FIDO1100 Datasheet - Page 43

• Manufacturer Part Number: FIDO1100
• Description: 32-bit Real-time Communications Controller
• Manufacturer: Innovasic Semiconductor Inc.

Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
4.3.3 BGA 15- by 15-mm Signal Routing
The 15- by15-mm BGA can be easily routed using economical and readily available PCB
fabrication design rules. In order to route all signals from the fido1100 BGA, 2 layers in addition
to power and ground are required, using 0.1mm trace/space technology. Since 0.1mm =
3.937mil, most PCB fabricators will consider this 4mil trace/space.
The PCB land pattern for the BGA should use 0.3mm round pads. Since the BGA pitch is
0.8mm, this leaves 0.5mm of space between pads. Using 0.1mm trace/space, 2 signals may be
routed between each pair of pads (2 traces + 3spaces = 0.5mm). Figure 8 shows how this is
accomplished.
Referring to Figure 8, signal layer 1 is shown in black, signal layer 2 is shown in red, and the
vias are shown in blue. Signal layer 1 is the top side with the BGA pads, while signal layer 2
may be any other layer, but is typically the bottom side. All vias with no trace routed out from
the BGA are power or ground.
Note that the innermost row of pads is all power and ground, except for 9 pads which are signals.
Three of these signals are easily routed on signal layer 1, but 6 of them require the use of vias
and signal layer 2. If all of the signals are not required for a given design, it may be possible to
route all of the used signals on signal layer 1.
It may be beneficial to place more vias and to route more signals on layers other than signal layer
1. This could produce a better PCB layout, but care should be exercised to not include an
excessive number of vias. The use of too many vias can lead to inadequate copper on the
power/ground plane layers surrounding the center area of the BGA, resulting in relative isolation
of the BGA power/ground via connections.
Note the open space between pads M17 and N17 (A1 is upper left corner). These signals are
XTAL1 and XTAL0. It is best not to route other signals between these pads, especially if a
crystal is used for the clock source.
The power connections to the inner ring of pads have 4 vias for +3.3V and 4 vias for +2.5V. The
use of a single bypass capacitor for each via, and alternating 0.1uF and 0.01uF values on each
supply, provide reasonable bypass capacitance for the fido1100. Using 8 capacitors in this
manner allows the use of capacitors in the 0603 package for economical PCB assembly.
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Page 43 of 83
IA211080807-07
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April 15, 2010
Data Sheet
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