FIDO1100 Innovasic Semiconductor Inc., FIDO1100 Datasheet - Page 76

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FIDO1100

Manufacturer Part Number
FIDO1100
Description
32-bit Real-time Communications Controller
Manufacturer
Innovasic Semiconductor Inc.
Datasheet

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Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
Table 23. Debug Scan Chain Commands Supported by the JTAG TAP
Notes:
Instruction
00010000
00010001
00010010
00010011
00010100
11111110
11111000
11111010
11111111
00000111
00001111
1. The boundary-scan scan chain is selected via the EXETEST, SAMPLE, and PRELOAD
2. The SAMPLE and PRELOAD instructions have the SAME binary code. (They are identified as
3. Any undefined bit pattern that is shifted into the Instruction Register will perform the same
4. On Power-on Reset, or when the JTAG state machine enters the ―Test Logic Reset‖ the
JTAG
instructions.
separate instructions in the JTAG Spec, but are allowed to have the same binary code for
backwards compatibility with previous version of spec.)
function as the BYPASS instruction.
instruction register will reset its value to operate as the IDCODE Instruction (per JTAG Spec).
READWRITEADDRCMD (Read/Write
Memory/Registers Address and Command)
READDATA (Read Memory/Registers Data)
WRITEDATA (Write Memory/Registers Data)
READPC_ANDCONTEXT (Read Program
Counter and Active context)
READWRITEDRBUGREG (Read/Write Debug
Control Register)
IDCODE (Read Device ID Register)
EXTEST (IO Boundary Scan)
SAMPLE/PRELOAD (Sample Boundary Scan
chain on ―Capture-DR‖ state, Load Boundary
Scan chain on ‗Update-DR‘ state)
BYPASS (Use TDI/TDO Bypass Register)
RUNBIST (Run Built in Self Test)
ENABLEATPG (Enable ATPG Mode for
Manufacturing Test)
®
Scan Chain Function
UNCONTROLLED WHEN PRINTED OR COPIED
Page 76 of 83
IA211080807-07
(I/O Pins)
(I/O Pins)
Length
37 bits
32 bits
32 bits
37 bits
15 bits
32 bits
16 bits
Chain
N bits
n bits
Scan
1 bit
N/A
Scan Chain
Reference
Number
N/A
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Customer Support:
April 15, 2010
Data Sheet
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