MBM29DL16XTE70PFTN Meet Spansion Inc., MBM29DL16XTE70PFTN Datasheet - Page 32

• Manufacturer Part Number: MBM29DL16XTE70PFTN
• Description: Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit Dual Operation
• Manufacturer: Meet Spansion Inc.

32
MBM29DL16XTD/BD
• RESET
Hardware Reset
• Boot Block Sector Protection
• Accelerated Program Operation
The MBM29DL16XTD/BD devices may be reset by driving the RESET pin to V
requirement and has to be kept low (V
Any operation in the process of being executed will be terminated and the internal state machine will be reset
to the read mode “t
devices require an additional “t
be in the standby mode for the duration of the pulse and all the data output pins will be tri-stated. If a hardware
reset occurs during a program or erase operation, the data at that particular location will be corrupted. Please
note that the RY/BY output signal should be ignored during the RESET pulse. See “(11) RESET, RY/BY Timing
Diagram” in ■TIMING DIAGRAM for the timing diagram. Refer to Temporary Sector Group Unprotection for
additional functionality.
The Write Protect function provides a hardware method of protecting certain boot sectors without using V
function is one of two provided by the WP/ACC pin.
If the system asserts V
“outermost” 8K byte boot sectors (MBM29DL16XTD: SA37 and SA38, MBM29DL16XBD: SA0 and SA1)
independently of whether those sectors were protected or unprotected using the method described in “Sector
Group Protection”. The two outermost 8K byte boot sectors are the two sectors containing the lowest addresses
in a bottom-boot-configured device, or the two sectors containing the highest addresses in a top-boot-congfigured
device.
If the system asserts V
sectors were last set to be protected or unprotected. That is, sector group protection or unprotection for these
two sectors depends on whether they were last protected or unprotected using the method described in “Sector
Group Protection”.
MBM29DL16XTD/BD offers accelerated program operation which enables the programming in high speed.
If the system asserts V
time required for program operation will reduce to about 60%. This function is primarily intended to allow high
speed program, so caution is needed as the sector group will temporarily be unprotected.
The system would use a fact program command sequence when programming during acceleration mode.
Set command to fast mode and reset command from fast mode are not necessary. When the device enters the
acceleration mode,
used for programming and detection of completion during acceleration mode.
Removing V
ACC pin while programming. See “(18) Accelerated Program Timing Diagram” in ■TIMING DIAGRAM.
Erase operation at Acceleration mode is strictly prohibited.
ACC
from the WP/ACC pin returns the device to normal operation. Do not remove V
READY
the device automatically set to fast mode. Therefore, the pressent sequence could be
ACC
IL
IH
” after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the
on the WP/ACC pin, the device disables program and erase functions in the two
on the WP/ACC pin, the device reverts to whether the two outermost 8K byte boot
to the WP/ACC pin, the device automatically enters the acceleration mode and the
RH
” before it will allow read access. When the RESET pin is low, the devices will
Retired Product DS05-20874-8E_July 12, 2007
IL
) for at least “t
-70/90
RP
” in order to properly reset the internal state machine.
IL
. The RESET pin has a pulse
ACC
from WP/
ID
. This