MBM29DL16XTE70PFTN Meet Spansion Inc., MBM29DL16XTE70PFTN Datasheet - Page 39

• Manufacturer Part Number: MBM29DL16XTE70PFTN
• Description: Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit Dual Operation
• Manufacturer: Meet Spansion Inc.

*1 : Successive reads from the erasing or erase-suspend sector cause DQ
*2 : Reading from non-erase suspend sector address will indicate logic “1” at the DQ
• DQ
Data Polling
In Progress
Exceeded
Time Limits
The MBM29DL16XTD/BD devices feature Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the
devices will produce the complement of the data last written to DQ
Algorithm, an attempt to read the device will produce the true data last written to DQ
Erase Algorithm, an attempt to read the device will produce a “0” at the DQ
Embedded Erase Algorithm an attempt to read the device will produce a “1” at the DQ
for Data Polling (DQ
For programming, the Data Polling is valid after the rising edge of fourth write pulse in the four write pulse
sequence.
For chip erase and sector erase, the Data Polling is valid after the rising edge of the sixth write pulse in the six
write pulse sequence. Data Polling must be performed at sector address within any of the sectors being erased
and not a protected sector. Otherwise, the status may not be valid.
If a program address falls within a protected sector, Data Polling on DQ
that bank returns to the read mode. After an erase command sequence is written, if all sectors selected for
erasing are protected, Data Polling on DQ
Once the Embedded Algorithm operation is close to being completed, the MBM29DL16XTD/BD data pins (DQ
may change asynchronously while the output enable (OE) is asserted low. This means that the devices are
driving status information on DQ
Depending on when the system samples the DQ
has completed the Embedded Algorithm operation and DQ
may be still invalid. The valid data on DQ
7
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Program
Suspended
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
7
) is shown in “(3) Data Polling Algorithm” (in ■FLOW CHART).
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
Program Suspend Read
(Program Suspended Sector)
Program Suspend Read
(Non-Program Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
Status
7
at one instant of time and then that byte’s valid data at the next instant of time.
Hardware Sequence Flags Table
Retired Product DS05-20874-8E_July 12, 2007
7
0
is active for approximately 400 μs, then the bank returns to read mode.
to DQ
7
7
output, it may read the status or valid data. Even if the device
will be read on the successive read attempts.
MBM29DL16XTD/BD
7
has a valid data, the data outputs on DQ
7
. Upon completion of the Embedded Program
Data
Data
Data
DQ
DQ
DQ
DQ
DQ
0
1
0
7
7
7
7
7
7
2
is active for approximately 1 μs, then
to toggle.
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Data
Data
Data
7
DQ
output. Upon completion of the
1
6
2
bit.
7
Data
Data
Data
DQ
. During the Embedded
7
0
0
0
0
1
1
1
output. The flowchart
5
Data
Data
Data
DQ
0
1
0
0
0
1
0
3
Toggle*
Toggle
0
Data
Data
Data
DQ
N/A
N/A
to DQ
-70/90
1*
1
1
2
2
1
7
6
)
39