CS2411 Amphion, CS2411 Datasheet

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CS2411

Manufacturer Part Number
CS2411
Description
User-programmable Fft/ifft 1024-point Block Based
Manufacturer
Amphion
Datasheet
The CS2411 is an online programmable, block-based architecture 1024-point FFT/IFFT core. It is based on a radix-
4 / radix-16 algorithm that performs FFT/IFFT computation in four computation passes. This highly integrated
application specific silicon core is available in both ASIC and FPGA versions that have been handcrafted by
Amphion for maximum performance while minimizing power consumption and silicon area.
Figure 1: CS2411 Block Diagram
X
1024 Point Block Based FFT/IFFT
On-line programmable FFT/IFFT core
13-bit complex input/output in two's
complement format (26-bit complex word)
13-bit twiddle factors generated inside the
core
16-bit fixed-point internal arithmetic operation
Programmable shift down control
Mixed radix-4 - radix-16 architecture
Transform performed in four computation
passes with zero-waiting
Simultaneous loading/downloading
supported
Both input and output in normal order
No external memory required
Optimized for both ASIC and FPGA
technologies with the same functionality
Fully synchronous design
1024-word
Controller
dual-port
memory
Memory
FEATURES
Amphion continues to expand its family of application-specific cores
Preliminary Datasheet
See http://www.amphion.com for a current list of products
CS2411
Butterfly
Radix-4
I/O interface and transform control
Multiplier
Complex
Twiddle
Number
LUT
Logic Area:
Memory Area:
Input Clock:
Communications modulation schemes
Image processing
Atmospheric imaging
Spectral representation
Processing Unit
APPLICATIONS
Selectable
KEY METRICS
Butterfly
Virtual Components for the Converging World
Radix-4/
34K gates
108 MHz
51K RAM
Mux
TM
Y
1

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CS2411 Summary of contents

Page 1

... Point Block Based FFT/IFFT Preliminary Datasheet The CS2411 is an online programmable, block-based architecture 1024-point FFT/IFFT core based on a radix radix-16 algorithm that performs FFT/IFFT computation in four computation passes. This highly integrated application specific silicon core is available in both ASIC and FPGA versions that have been handcrafted by Amphion for maximum performance while minimizing power consumption and silicon area ...

Page 2

... The radix-4 algorithm offers a balance between the computational and circuit complexity and is often used in construction of higher radix FFT computation units when designing high performance FFT/IFFT hardware. Table 1: CS2411 - 1024 Point FFT / IFFT Interface Signal Definitions Name I/O Width CLK I ...

Page 3

... Table 1: CS2411 - 1024 Point FFT / IFFT Interface Signal Definitions Name I/O Width Done O 1 Output signal indicating the transform result is available. It goes to HIGH when the core is ready to output transform result and returns to LOW when YEnab is asserted to download the result. YBS O 1 Output data Y block start signal, active HIGH, asserted when the first data of the 1024-point trans- formed block is available on the output port ...

Page 4

... FIXED WORD LENGTH AND ACCURACY The CS2411 core uses fixed-point arithmetic to perform the transform. The twiddle factors (Sine and Cosine values), which are generated by the core internally, have 13-bit accuracy. At the end of each computation pass, the result is rounded to 13 bits. Figure 4 illustrates the word lengths at various computation stages in the CS2411 core ...

Page 5

... Table 6 gives the simulation results on the transform accuracy of CS2411 core. These results are obtained by applying 64 blocks of 13-bit random input data to the core and the scaling down control is set such that there is just no overflow in the computation. For example, the output magnitude is maximized while no overflow occurs. The 13-bit output data from the core is compared with the result of double precision FFT model ...

Page 6

... Assert CLR to program the core for FFT/IFFT transform type by scaling factor. Assert XBS for one cycle Input to load the N-point data Assert XBS for one cycle to load the N-point data Figure 6: CS2411 Operating Flowchart 6 5120 cycles 5093 cycles 2 N-1 block into the core. No Done = ’ ...

Page 7

... OVERFLOW HANDLING CS2411 keeps track of the numeric values during the transform computation. If overflow occurs, due to the insufficient number of shifting down bits programmed for the given input data, the overflow value is saturated and the overflow flag signal (YOV) is asserted to alert the application system ...

Page 8

... CS2411 1024 Point FFT/IFFT ABOUT AMPHION Amphion (formerly Integrated Silicon Systems) is the leading supplier of speech coding, video/ image processing and channel coding application specific silicon cores for system-on-a-chip (SoC) solutions in the broadband, wireless, and mulitmedia markets. Web: www.amphion.com Email: info@amphion.com ...

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