CS2461 Amphion, CS2461 Datasheet
CS2461
Related parts for CS2461
CS2461 Summary of contents
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... The CS2461 is an online programmable, block-based architecture 64-point FFT/IFFT core. This highly integrated application specific core computes the FFT/IFFT based on radix-4 algorithm in three computation passes. The CS2461 is available in both ASIC and FPGA versions that have been handcrafted by Amphion for maximum performance while minimizing power consumption and silicon area. ...
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... XBS is ignored when it is HIGH. 2 AND PIN DESCRIPTION p Figure 2 and Table 1 provide the CS2461 block based 64-point FFT/ -point discrete IFFT core symbol, and the I/O interface descriptions respectively. Unless otherwise stated, all signals are active high and bit(0) is the least significant bit ...
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... The core performs conditional shifting down on the internal data during the 64-Point transform. Theoretically the 64-Point FFT may have total of 7-bits word growth. The CS2461 core can perform up to 7-bit controlled shifting down operation to avoid possible overflow and also to allow the transform gain to be controlled ...
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... SDC Figure 3: Configuration Timing INPUT AND OUTPUT DATA FORMAT The input complex number data for the CS2461 is represented by 12-bit real and imaginary components, namely XRe and XIm, in the two's complement format. The input data is loaded into the core in the normal order, i.e., X(0) enters the core first, followed immediately in the next clock cycle by X(1), and then X(2), etc ...
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... Table 5 gives the simulation results on the transform accuracy of CS2461 core. The results are obtained by applying 64 blocks of 12-bit random input data to the core and the scaling down control is set such that there is just no overflow in the computation, i.e., the output magnitude is maximized while no overflow occurs. The 12-bit output data from the core is compared with the result of double precision FFT model ...
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... N -1 The CS2461 keeps track of the numeric values during the transform computation. If overflow occurs, due to the insufficient number of shifting down bits programmed for the given input data, the overflow value is saturated and the overflow flag signal (YOV) is asserted to alert the application system ...
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... AVAILABILITY AND IMPLEMENTATION INFORMATION Amphion offers the CS2461 core in ASIC and programmable logic versions. Consult your local Amphion representative for product specific performance information, current availability of individual products, and lead times on ASIC or different programmable logic core porting. The implementation information provided in Table 7 has been obtained for a stand-alone design on an Altera Apex EP20K60EQC208-2 device and a QuickLogic QL7100 device ...
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... CS2461 64- Point Block Based FFT/IFFT ABOUT AMPHION Amphion (formerly Integrated Silicon Systems) is the leading supplier of speech coding, video/ image processing and channel coding application specific silicon cores for system-on-a-chip (SoC) solutions in the broadband, wireless, and mulitmedia markets. Web: www.amphion.com Email: info@amphion.com ...