CS6652 Amphion, CS6652 Datasheet
CS6652
Related parts for CS6652
CS6652 Summary of contents
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... Simple core interface for easy integration into larger systems. 1. This information is for CS6652-Lite core which is a reduced gate count version not including the SDRAM memory controller and display DMA. For more information please refer to Table 3 & 4. Amphion continues to expand its family of application-specific cores See http://www ...
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... CS6652/54 Multi-stream MPEG-2 Video Decoders CS6652/CS6654 MPEG-2 MULTISTREAM VIDEO DECODERS Table 1 Defines MPEG-2 profiles and levels supported by the CS6652 & CS6654 MPEG-2 multistream video decoders. Table 1: MPEG-2 Profiles and Levels Supported by CS6652/54 Cores Profile Level High Samples/line Lines/frame Frames/sec Max. luma samples rate ...
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... ES_Stall. ES_Data and ES_Valid will be ignored while ES_Stall is asserted. Output Elementary Stream Select, either a 1-bit (CS6652) or 2-bit (CS6654) signal represent- ing the number of the elementary stream which the core is currently accepting and decoding via ES_Data. This signal may be used to drive a mux to switch the correct elementary stream into the core when selected ...
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... CS6652/54 Multi-stream MPEG-2 Video Decoders Table 2: CS6652/54 Interface Signal Definitions Signal Width Picture Output Interface (One per elementary stream) P_Data 16 P_DataStrobe 1 P_DataAvail 1 P_DataType 4 P_RowDoneIn 1 P_PicDoneIn 1 P_RowDoneOut 1 P_PicDoneOut 1 P_General 8 Frame Store Interface SD_DataIn 64 SD_DataOut 64 SD_notDatDrv 1 SD_Addr 11 SD_BA 2 SD_DQM 8 SD_notRAS 1 SD_notCAS 1 SD_notWE 1 SD_notCS ...
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... Table 2: CS6652/54 Interface Signal Definitions Signal Width Host Interface H_DataIn 32 H_DataOut 32 Output H_notDatDrv 1 Output H_Addr 22 H_notRegCS 1 H_notWrite 1 H_notIRQ 1 Output H_ByteEnable 4 H_notMemRead 1 H_notMemWrite 1 H_MemBusy 1 Output H_MemRdValid 1 Output H_MemRdStrb 1 H_MemWrValid 1 H_MemWrReady 1 Output I/O Input Host Data Input, host write data into the core. Host Data Output, host read data from the core. This pipelined output reflects the value of the register selected by H_Addr ...
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... CS6652/54 Multi-stream MPEG-2 Video Decoders CS6652/CS6654 FUNCTIONAL DESCRIPTION Figure 3 represents a block diagram of the main functional blocks in the CS6652. This is followed by a high-level description of these blocks, which is equally applicable to the CS6654. Input ES Parser Video ES ES Select ASD Regs ASD mem 0 mem Regs ...
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... This interface accepts elementary stream data through the byte wide ES_Data port. If the core temporarily cannot receive any further data switching from one elementary stream to another ES_Stall is asserted. In the CS6652 or CS6654 the ES_Select output is either a single or 2-bit signal, respectively, representing the number of the elementary stream that the core is currently accepting and decoding via ES_Data ...
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... HOSTINTERFACE: CONFIGURATION AND CONTROL When the CS6652 or CS6654 is running with the assistance of a host CPU, a number of additional features can be accessed. All of the interfacing between the host and the CS6652 or CS6654 is performed through the HostInterface. This allows the read/ write access to all the internal control, status and video stream parameter registers (for each stream) within the decoder ...
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... Amphion experts. Consult your local Amphion representative for product specific performance information, current availability of individual products, and lead times on ASIC core porting. Table 3: CS6652 Core Using TSMC Standard Cell Libraries Product ID # Process ...
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... CS6652/54 Multi-stream MPEG-2 Video Decoders ABOUT AMPHION Amphion (formerly Integrated Silicon Systems) is the leading supplier of speech coding, video/ image processing and channel coding application specific silicon cores for system-on-a-chip (SoC) solutions in the broadband, wireless, and mulitmedia markets Web: www.amphion.com Email: info@amphion.com ...