MB81ES171625 Fujitsu Media Devices Limited, MB81ES171625 Datasheet - Page 29

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MB81ES171625

Manufacturer Part Number
MB81ES171625
Description
SINGLE DATA RATE I/F FCRAM Consumer/Embedded Application Specific Memory for SiP
Manufacturer
Fujitsu Media Devices Limited
Datasheet
(2) Base Values for Clock Count/Latency
*: t
(3) Clock Count Formula
Note: All base values are measured from the clock edge at the command input to the clock edge for the next
XRAS Cycle Time *
XRAS Precharge Time
XRAS Active Time
XRAS to XCAS Delay Time
Write Recovery Time
XRAS to XRAS Bank Active Delay Time
Data-in to Precharge Lead Time
Data-in to Active/ Refresh Command Period
Refresh Cycle Time
Mode Resister Set Cycle Time
and t
RC
(Min) is not sum of t
command input. All clock counts are calculated by a simple formula : clock count equals base value divided
by clock period (round up to a whole number) .
RP
(Min) .
Clock
Parameter
Clock Period
Base Value
RAS
(Min) and t
RP
(Round up to a whole number)
(Min) . Actual clock count of t
MB81ES171625/173225-15-X
Symbol
t
t
t
t
t
t
t
REFC
t
t
t
RAS
RCD
RRD
RSC
DPL
DAL
WR
RP
RC
RC
1cyc t
(l
RC
Min
75
30
45
30
15
15
15
75
45
) must satisfy t
RP
Value
RC
110000
Max
(Min) , t
RAS
(Min)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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