MB81ES171625 Fujitsu Media Devices Limited, MB81ES171625 Datasheet - Page 38

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MB81ES171625

Manufacturer Part Number
MB81ES171625
Description
SINGLE DATA RATE I/F FCRAM Consumer/Embedded Application Specific Memory for SiP
Manufacturer
Fujitsu Media Devices Limited
Datasheet
38
MB81ES171625/173225-15-X
10.
11.
Note : The precharge command (PRE) should be issued only after the t
*1: The First DQM makes high-impedance state (High-Z) between the last output and the first input data.
*2: The Second DQM makes internal output data mask to avoid bus contention.
*3: The Third DQM in illustrated above also makes internal output data mask. If burst read ends (the final
CLK
Command
DQM
DQ
CLK
Command
DQ
WRITE Interrupted by Precharge
READ Interrupted by WRITE
data output) at or after the second clock of burst write, this third DQM is required to avoid internal bus
contention.
PRE means ‘PRE’ or ‘PALL’.
D
READ
n
(
1
Example @ CL
LAST D
* 1
n
t
DPL
(Min)
2
by Precharge
,
DQZ2
BL
MASKED
PRE
(2 clocks)
Q
* 2
1
4
)
t
RP
(Min)
OWD
Masked
ACTV
(2 clocks)
* 3
DPL
of final data input is satisfied.
WRIT
D
1
DWD
(same clock)
D
2

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