MB85RS256A Fujitsu, MB85RS256A Datasheet
MB85RS256A
Available stocks
Related parts for MB85RS256A
MB85RS256A Summary of contents
Page 1
... MB85RS256A adopts the Serial Peripheral Interface (SPI). The MB85RS256A is able to retain data without using a back-up battery needed for SRAM. The memory cells used in the MB85RS256A can be used for 10 improvement over the number of read and write operations supported by Flash memory and E MB85RS256A does not take long time to write data unlike Flash memories nor E takes no wait time ...
Page 2
... MB85RS256A ■ PIN ASSIGNMENT GND ■ PIN FUNCTIONAL DESCRIPTIONS Pin No. Pin Name Chip Select This is an input pin to make chips select. When CS is “H”, device is in deselect (standby status as long as device is not write status internally, and SO becomes High-Z. Other in- puts from pins are ignored for this time. When CS is “ ...
Page 3
... BLOCK DIAGRAM Serial-Parallel Converter SI CS SCK HOLD WP Parallel-Serial Converter SO DS501-00007-0v01-E MB85RS256A FRAM Cell Array 32,768 ✕ 8 FRAM Status Register Column Decoder/Sense Amp/ Write Amp Data Register 3 ...
Page 4
... MB85RS256A ■ SPI MODE MB85RS256A corresponds to the SPI mode 0 (CPOL = 0, CPHA = 0) , and SPI mode 3 (CPOL = 1, CPHA = SCK SI 7 MSB CS SCK MSB SPI Mode SPI Mode LSB LSB DS501-00007-0v01-E ...
Page 5
... SERIAL PERIPHERAL INTERFACE (SPI) MB85RS256A works as a slave of SPI. More than 2 devices can be connected by using microcontroller equipped with SPI port. By using a microcontroller not equipped with SPI port, SI and SO can be bus connected to use. SCK MOSI MISO SPI Microcontroller SS1 SS2 HOLD1 ...
Page 6
... WEL 0 0 ■ OP-CODE MB85RS256A accepts 6 kinds of command specified in op-code. Op-code is a code composed of 8 bits shown in the table below. Do not input invalid codes other than those codes risen while inputting op-code, the command are not performed. Name WREN Set Write Enable Latch ...
Page 7
... The WRDI command resets WEL (Write Enable Latch) . Writing operation (WRITE command and WRSR command) are not performed when WEL is reset SCK Invalid DS501-00007-0v01 High High-Z MB85RS256A 6 7 Invalid Invalid 0 7 ...
Page 8
... MB85RS256A • RDSR The RDSR command reads status register data. After op-code of RDSR is input to SI, 8-cycle clock is input to SCK. The SI value is invalid for this time output synchronously to a falling edge of SCK. Continuously reading status register is enabled by keep on sending SCK before rising CS with the RDSR command. ...
Page 9
... Address High 16-bit Address High-Z MB85RS256A Invalid LSB MSB Data Out LSB Invalid ...
Page 10
... MB85RS256A ■ BLOCK PROTECT Writing protect block is configured by the WRITE command with BP1, BP0 value of the status register. BP1 BP0 ■ WRITING PROTECT Writing operation of the WRITE command and the WRSR command are protected with the value of WEL, WPEN shown in the table ...
Page 11
... CC − 0 − 0.5 V OUT − − 40 Tstg Value Symbol Min V 3.0 CC × 0 − 0 − MB85RS256A Unit Max + °C + 125 °C Unit Typ Max 3.3 3.6 V ⎯ ⎯ + 0.6 V ⎯ °C ...
Page 12
... MB85RS256A ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics Parameter Symbol Input leakage current Output leakage current Operating power supply current Standby current Output high voltage Output low voltage 12 (within recommended operating conditions) Condition Min = ⎯ ⎯ ...
Page 13
... Operation temperature Input voltage magnitude : 0 2.7 V Input rising time : 5 ns Input falling time : 5 ns Input judge level : Output judge level : DS501-00007-0v01-E MB85RS256A (within recommended operating conditions) Value Symbol Min CSU ...
Page 14
... MB85RS256A AC Load Equivalent Circuit 3. Pin Capacitance Parameter Output capacitance Input capacitance 14 3.3 V 1.2 k Output 0. Value Symbol Min ⎯ ⎯ Unit Max DS501-00007-0v01-E ...
Page 15
... Serial Data Timing CS t CSU SCK Valid in High don't care • Hold Timing CS SCK t HS HOLD SO DS501-00007-0v01 ODV High MB85RS256A CSH t OD High High ...
Page 16
... MB85RS256A ■ POWER ON/OFF SEQUENCE tpd (Min (Max) IL GND × 0.8* CS > 0 (Max) < Note : • Because turning the power-on from an intermediate level may cause malfunctions, when the power is turned on required to be started from • If the device does not operate within the specified conditions of read cycle, write cycle, power on/ off sequence, memory data can not be guaranteed ...
Page 17
... ORDERING INFORMATION Part number TBD TBD Note : Please confirm the ordering information with the sales representatives. DS501-00007-0v01-E MB85RS256A Package 8-pin plastic SOP (FPT-8P-M02) 8-pin plastic SOP Embossed Carrier tape (FPT-8P-M02) Remarks 17 ...
Page 18
... MB85RS256A ■ PACKAGE DIMENSION 8-pin plastic SOP (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M02) +0.25 +.010 * 1 .199 5.05 –0.20 –.008 1.27(.050) 0.44±0.08 (.017±.003) 0.10(.004) 0.10(.004) 2002-2010 FUJITSU SEMICONDUCTOR LIMITED F08004S-c-4-9 C Please check the latest package dimension at the following URL. ...
Page 19
... MEMO DS501-00007-0v01-E MB85RS256A 19 ...
Page 20
... MB85RS256A FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us ...