GS1532 Gennum Corporation, GS1532 Datasheet
GS1532
Related parts for GS1532
GS1532 Summary of contents
Page 1
... The GS1532 may also be used in data pass-through mode where no processing of the data is performed. Parallel data inputs are provided in both 10-bit multiplexed and 20-bit demultiplexed format for HD and SD signal rates. ...
Page 2
... POR power on reset GS1532 FUNCTIONAL BLOCK DIAGRAM GS1532 FUNCTIONAL BLOCK DIAGRAM GS1532 FUNCTIONAL BLOCK DIAGRAM GS1532 FUNCTIONAL BLOCK DIAGRAM 2 Phase detctor, charge pump, VCO control & power supply SDO_EN/DIS EDH SDO SMPTE generation ...
Page 3
... REFERENCES 5. REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5. REFERENCES 5. REFERENCES 6. PACKAGE & ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 6. PACKAGE & ORDERING INFORMATION 6. PACKAGE & ORDERING INFORMATION 6. PACKAGE & ORDERING INFORMATION 6.1 PACKAGE DIMENSIONS 6.2 ORDERING INFORMATION 7. REVISION HISTORY 7. REVISION HISTORY 7. REVISION HISTORY 7. REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 GENNUM CORPORATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21498 - 0 ...
Page 4
... PIN OUT 1. PIN OUT 1. PIN OUT 1.1 PIN ASSIGNMENT 80 1 CP_V DD PD_GND PD_V DD DVB_ASI SD/HD 20 bit/10 bit IOPROC_EN/DIS SMPTE_BYPASS RSET CD_V DD 21 GENNUM CORPORATION GS1532 (Top View IO_GND DIN17 DIN16 DIN15 DIN14 DIN13 DIN12 IO_V DD DIN11 DIN10 DIN9 IO_GND DIN8 DIN7 DIN6 ...
Page 5
... DVB_ASI Synchronous 11 SD/HD Synchronous 12 20bit/10bit Synchronous 13 IOPROC_EN/DIS Synchronous GENNUM CORPORATION TYPE Input Power Power supply connection for the charge pump 3.3V DC Input Power GND pin for the phase detector Input Power Power supply for the Phase Detector 1.8V DC Non Input CONTROL SIGNAL INPUT Signal levels are LVCMOS / LVTTL compatible. ...
Page 6
... SDO_EN/DIS Synchronous 22 CD_GND Analog 23, 24 SDO, SDO Analog GENNUM CORPORATION TYPE Non Input CONTROL SIGNAL INPUT Signal levels are LVCMOS / LVTTL compatible. Used to enable / disable all SMPTE encoding, scrambling and word alignment. When set LOW, SMPTE scrambling and encoding will be disabled. ...
Page 7
... Synchronous 27 CS_TMS Synchronous with SCLK_TCK 28 SDOUT_TDO Synchronous with SCLK_TCK GENNUM CORPORATION TYPE Non Input CONTROL SIGNAL INPUT Signal levels are LVCMOS / LVTTL compatible. Used to reset the internal operating conditions to default settings and to reset the JTAG test sequence. Normal mode (JTAG/HOST = LOW) ...
Page 8
... The F signal will be LOW for all lines in field 1 and for all lines in progressive scan systems. The GS1532 uses the F input signal for internal timing generation (when DETECT_TRS = LOW) and will set the F bit in all outgoing TRS signals for the entire period that the F input signal is HIGH. ...
Page 9
... H timing can be changed to be HIGH for the entire horizontal blanking period as indicated by the H bit in the TRS words. The GS1532 uses the H input signal for internal timing generation (when DETECT_TRS = LOW) and will use this signal in the generation of the TRS signals (when IOPROC_EN/DIS is HIGH). ...
Page 10
... DIN[0:9] Synchronous 42~48, with PCLK 50 40, 49 IO_GND Synchronous 41, 53 IO_VDD Synchronous GENNUM CORPORATION TYPE Input PARALLEL DATA BUS Signal levels are LVCMOS / LVTTL compatible. HDTV 20 bit mode SD/HD = LOW 20 bit/10 bit = HIGH HDTV 10 bit mode SD/HD = LOW 20 bit/10 bit = LOW SDTV 20 bit mode ...
Page 11
... Synchronous 54~59, with PCLK 62 IO_GND Synchronous 61 IO_VDD Synchronous 64 CORE_VDD Synchronous GENNUM CORPORATION TYPE Input PARALLEL DATA BUS Signal levels are LVCMOS / LVTTL compatible. HDTV 20 bit mode SD/HD = LOW 20 bit/10 bit = HIGH HDTV 10 bit mode SD/HD= LOW 20 bit/10 bit = LOW SDTV 20 bit mode SD/HD = HIGH ...
Page 12
... RSV1 8, 10, 14, 15, 16, 17 31, 65, RSV2 66, 70, 71 GENNUM CORPORATION TYPE Non Input CONTROL SIGNAL INPUT Signal levels are LVCMOS / LVTTL compatible. Used to select external HVF timing mode or TRS extraction timing mode. When DETECT_TRS is LOW, the device will extract all internal timing information from the supplied H:V:F timing signals ...
Page 13
... Ambient Operating Temperature Storage Temperature Lead Temperature (soldering, 10 sec) NOTES: 1. See reflow profile solder Temperature 230˚C 220˚C 183˚C 150˚C 100˚C 25˚C GENNUM CORPORATION VALUE/UNITS -0.3V to +2.1V -0.3V to +4.6V -2. 5.25V -20°C < T < 85°C A -40°C < T < 125°C STG 230°C 60-150 sec ...
Page 14
... Production test at room temperature and nominal supply voltage sample test. 5. Calculated result based on Level Not tested. Guaranteed by design simulations. 7. Not tested. Based on characterization of nominal parts. 8. Not tested. Based on existing design/characterization data of similar product. 9. Indirect test. GENNUM CORPORATION CONDITIONS MIN 1.65 3.0 3 ...
Page 15
... Production test at room temperature and nominal supply voltage sample test. 5. Calculated result based on Level Not tested. Guaranteed by design simulations. 7. Not tested. Based on characterization of nominal parts. 8. Not tested. Based on existing design/characterization data of similar product. 9. Indirect test. GENNUM CORPORATION CONDITIONS MIN TYP - 1.485, 1.485/1.001, 270 ...
Page 16
... All resistors in ohms, all capacitors in farads, unless otherwise shown. Fig. 2 Serial Digital Output 300 Fig. 4 VCO Control Output & PLL Lock Time Capacitor VDD 42K 63K PCLK Fig. 6 PCLK Input GENNUM CORPORATION SDO SDO VCO VCO LF CP_CAP 800mV Fig. 5 PLL Loop Bandwidth Control ...
Page 17
... The IOPROC_EN/DIS pin and SMPTE_BYPASS pin must be set HIGH. Error Detection & Handling (EDH) Cyclical Redundancy Check (CRC) error correction mode the GS1532 will generate and insert EDH packets. Set HIGH to disable. The IOPROC_EN/DIS pin and SMPTE_BYPASS pin must be set HIGH. ...
Page 18
... ANC-IDH ANC-EDA ANC-EDH FF-UES FF-IDA FF-IDH FF-EDA FF-EDH GENNUM CORPORATION DESCRIPTION Not Used Ancillary Unknown Error Status will be generated and inserted when IOPROC_EN/ DIS and SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is LOW. SD mode only. Ancillary Internal device error Detected Already will be generated and inserted when IOPROC_EN/DIS and SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is LOW ...
Page 19
... REGISTER NAME NAME Not Used VIDEO_STANDARD VD_STD[4:0] INT_PROG STD_LOCK GENNUM CORPORATION DESCRIPTION Active Picture Unknown Error Status will be generated and inserted when IOPROC_EN/ DIS and SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is LOW. SD mode only. Active Picture Internal device error Detected ...
Page 20
... Table 5: Host Interface Description REGISTER NAME NAME RASTER_STRUCTURE RASTER_STRUCTURE_1 RASTER_STRUCTURE_2 RASTER_STRUCTURE_3 RASTER_STRUCTURE_4 GENNUM CORPORATION DESCRIPTION SMPTE 352M Byte 2 information must be programmed in this register when 352M_INS = LOW SMPTE 352M Byte 1 information must be programmed in this register when 352M_INS = LOW SMPTE 352M Byte 4 information ...
Page 21
... FF_LINE_START_F1 FF_LINE_START_F1 [9:0] FF_LINE_END_F1 FF_LINE_END_F1 LINE_0_352M LINE_0_352M[10:0] LINE_1_352M LINE_1_352M[10:0] GENNUM CORPORATION DESCRIPTION Not Used Field 0 Active Picture start line data used to set EDH calculation range outside of RP 165 values. Not Used Field 0 Active Picture end line data used to set EDH calculation range outside of RP 165 values ...
Page 22
... EM 125M (SD) 1440x487/60 (2:1)(Or dual link progressive) 1440x507/60 (2:1) 525-line 487 generic 525-line 507 generic ITU-R BT.656 1440x576/50 (2:1) (SD) 625-line generic (EM) Unknown HD SD/ Unknown SD SD/ Reserved GENNUM CORPORATION LENGTH OF LENGTH OF TOTAL HANC ACTIVE VIDEO SAMPLES 268 1920 2200 444 1920 2376 268 1920 2200 ...
Page 23
... GENNUM CORPORATION 23 21498 - 0 ...
Page 24
... GENNUM CORPORATION 24 21498 - 0 ...
Page 25
... GENNUM CORPORATION 25 21498 - 0 ...
Page 26
... SDOUT pin is a high-impedance output allowing multiple devices to be connected. The interface is illustrated in the Figure 7. All read or write access to the GS1532 is initiated and terminated by the application host processor. Each access always begins with a command / address word followed by a data read or write to/from the GS1532. ...
Page 27
... SDIN R/W RSV RSV RSV RSV RSV RSV RSV SDOUT 3.1.4 Configuration and Status Register Description The GS1532 provides status and configuration registers. These registers may be used to enable additional features of the device and/or to provide information. The GS1532 contains the following registers: • 4 VIDEO_FORMAT registers • ...
Page 28
... The output data format is defined by the setting of external pins 20bit/10bit, SMPTE_BYPASS and DVB_ASI. Table 8 lists the output signal formats according to the external selection pins for the GS1560. It should be noted GS1532 that DVB-ASI output will always be in 10-bit format, CS_TMS regardless of the setting of the 20bit/10bit pin. ...
Page 29
... DIN[9:0] will be set as high impedance in this mode. 3.3.4 PCLK Output DOUT [19:10] and DOUT [9:0] The frequency of the PCLK input signal of the GS1532 is determined by the input data format. Table 9 lists the input signal formats according to the external selection pins for the GS1532. ...
Page 30
... MULTIPLEXED Y Cr/Cb DATA INPUT 3FF GENNUM CORPORATION Horizontal blanking period / active line (H), Vertical blanking period (V), and Field odd / even (F) timing are presented to the device on the H:V:F input pins. Using the host interface register H_CONFIG, the H signal input timing can be selected as one of the following: ...
Page 31
... R63 0 10n GND 15K 100n GND_VCO GND C95 10n 1 CP_V DD 2 PD_GND 3 PD_V DD 4 RSV1 5 RSV1 6 RSV1 7 RSV1 U17 8 GND_A RSV1 9 GS1532 DVB_ASI SD/HD 12 20bit/10bit 13 IOPROC_EN/DIS 14 RSV1 15 RSV1 16 RSV1 17 RSV1 GND_A 18 SMPTE_BYPASS 19 RSET 20 CD_V DD C103 10n GND_A +1.8V PARALLEL CLOCK INPUT ...
Page 32
... Compliant with SMPTE 292M and SMPTE 259M-C. 6. PACKAGE & ORDERING INFORMATION 6. PACKAGE & ORDERING INFORMATION 6. PACKAGE & ORDERING INFORMATION 6. PACKAGE & ORDERING INFORMATION 6.1 PACKAGE DIMENSIONS GENNUM CORPORATION Table X CONTROL DIMENSIONS ARE IN MILLIMETERS. CONTROL DIMENSIONS ARE IN MILLIMETERS. Table ...
Page 33
... Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5 Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. TEMPERATURE RANGE 0°C to 70°C CHANGES AND/OR MODIFICATIONS New Document ...