GS1532 Gennum Corporation, GS1532 Datasheet - Page 29

• Manufacturer Part Number: GS1532
• Description: Serializer For HD-SDI, Sd-sdi & DVB-ASI. 3.3/1.8V Supply.
• Manufacturer: Gennum Corporation

When operating in 10-bit mode (20bit/10bit = LOW), the
input data format will be (word aligned), multiplexed Luma
and Chroma data. In this mode, the data will be presented
on the DIN[19:10] pins, with DIN[9:0] being high
impedance.
3.3.2 Input Data Format in Data Through Mode
Data
SMPTE_BYPASS and DVB_ASI pins are LOW.
In this mode data at the input bus is passed to the serial
output without any coding, scrambling or word-alignment
taking place. The input data width is controlled by the
setting of the 20bit/10bit pin as shown in Table 8.
3.3.3 Input Data Format in DVB-ASI Mode
The DVB-ASI mode of the GS1532 will be enabled when the
SMPTE_BYPASS pin is LOW, the DVB_ASI pin is HIGH, and
the SD/HD pin is HIGH.
Table 9: PCLK Output Rates
3.4 FLYWHEEL
The GS1532 has an internal flywheel, which may be used to
generate internal timing.
The flywheel will be locked to the externally provided H:V:F
signals (DETECT_TRS = LOW), or from embedded TRS
signals in the input data stream (DETECT_TRS = HIGH).
TRS signals from the Luma channel only will be used to lock
the flywheel when DETECT_TRS is HIGH and the device is
operating in HD mode (SD/HD = LOW).
When operating in SD mode, TRS code words will be
extracted from the multiplexed Y and Cr/Cb data.
NOTE: Both 8-bit and 10-bit TRS code words will be
identified by the device.
GENNUM CORPORATION
20-bit demultiplexed HD format
20-bit data input HD format
20-bit demultiplexed SD format
20-bit data input SD format
20-bit ASI input SD format
10-bit multiplexed HD format
10-bit data input HD format
10-bit multiplexed SD format
10-bit data input SD format
10-bit ASI input SD format
OUTPUT DATA FORMAT
through
mode
is
enabled
20bit/10bit
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
LOW
when
both
SD/HD
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
the
PIN SETTINGS
29
In this mode, all SMPTE processing features are disabled,
and the device will accept 8-bit transport stream data on
the DIN[19:10] port, which will be configured as follows:
DIN19 = INSSYNCIN
DIN18 = KIN
DIN17~10 = HIN ~ AIN where AIN is the least significant bit
of the transport stream data.
DIN[9:0] will be set as high impedance in this mode.
3.3.4 PCLK Output DOUT [19:10] and DOUT [9:0]
The frequency of the PCLK input signal of the GS1532 is
determined by the input data format.
Table 9 lists the input signal formats according to the
external selection pins for the GS1532.
The flywheel is only active in SMPTE mode of operation
(SMPTE_BYPASS = HIGH).
The main function of the flywheel is to 'learn' the required
video standard by storing parameters about the line and
field/frame rate. From this information internal timing and
control signals may be generated.
The flywheel consists of a number of counters and
comparators operating at video pixel and video line rates.
These counters maintain information about the total line
length, active line length, total number of lines per field/
frame and total active lines per field/frame for the received
video standard.
SMPTE_BYPASS
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
LOW
LOW
Don't Care
Don't Care
Don't Care
Don't Care
DVB_ASI
HIGH
HIGH
LOW
LOW
LOW
LOW
74.25 or 74.25/1.001MHz
74.25 or 74.25/1.001MHz
148.5 or 148.5/1.001MHz
148.5 or 148.5/1.001MHz
PCLK RATE
13.5MHz
13.5MHz
27MHz
27MHz
27MHz
27MHz
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