GS1532 Gennum Corporation, GS1532 Datasheet - Page 9

• Manufacturer Part Number: GS1532
• Description: Serializer For HD-SDI, Sd-sdi & DVB-ASI. 3.3/1.8V Supply.
• Manufacturer: Gennum Corporation

1.2 PIN DESCRIPTIONS (Continued)
GENNUM CORPORATION
NUMBER
PIN
35
36
37
CORE_VDD
NAME
V
H
(Continued)
(Continued)
(Continued)
Synchronous
Synchronous
Synchronous
with PCLK
with PCLK
TIMING
Non
Input Power
TYPE
Input
Input
9
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
The V signal is used to indicate the portion of the video field /
frame that is used for vertical blanking.
The V signal will be HIGH for the entire vertical blanking period.
The GS1532 uses the V input signal for internal timing generation
(when DETECT_TRS = LOW) and will set the V bit in all outgoing
TRS signals for the entire period that the V input signal is HIGH
(when IOPROC_EN/DIS is HIGH).
The V input is ignored when DETECT_TRS is HIGH.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
The H signal is used to indicate the portion of the video line
containing active video data.
Active Line Blanking
By default, the H signal should be LOW for the active portion of the
video line. The signal goes LOW at the first active pixel of the line,
and then goes HIGH after the last active pixel of the line.
The H signal should remain HIGH throughout the horizontal
blanking period (including both SAV and EAV TRS).
TRS Based Blanking
The timing of this signal is programmable via the host interface
such that the H timing can be changed to be HIGH for the entire
horizontal blanking period as indicated by the H bit in the TRS
words.
The GS1532 uses the H input signal for internal timing generation
(when DETECT_TRS = LOW) and will use this signal in the
generation of the TRS signals (when IOPROC_EN/DIS is HIGH).
The H input is ignored when DETECT_TRS is HIGH.
Power connection - Digital logic 1.8V DC
DESCRIPTION
21498 - 0