S8501 AMCC (Applied Micro Circuits Corp), S8501 Datasheet - Page 14

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S8501

Manufacturer Part Number
S8501
Description
Hd-sdi Data Retimer
Manufacturer
AMCC (Applied Micro Circuits Corp)
Datasheet
14
Timing
The data on the TX[19:0] data bus will be sampled on every rising edge of REFCLK. The data will be serialized and
transmitted onto the serial link. The figure below illustrates the timing requirements of REFCLK with respect to the
TX[19:0] signals, minimum high and low durations, and the rising and falling slew rate magnitudes. In addition, this
system supplied clock must not have more jitter than 20% of a baud interval.
S8401/S8501
Table 10. S8401 Transmitter Timing Table
Note: All AC measurements are made from the reference voltage level of the clock (1.4V) to the valid input or output data
levels (.8V or 2.0V).
Table 11. Serial Data Timing Table (TLX, TLY; TX, TY)
Tested per Figure 9.
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R
T
R
R
D
R
D
R
R
R
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C
C
C
C
C
C
C
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