IDT7005L Integrated Device Technology, Inc., IDT7005L Datasheet - Page 11

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IDT7005L

Manufacturer Part Number
IDT7005L
Description
High-speed 8k X 8 Dual-port Static RAM
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
TIMING WAVEFORM OF SEMAPHORE READ AFTER WRITE TIMING, EITHER SIDE
NOTES:
1.
2. "DATA
TIMING WAVEFORM OF SEMAPHORE WRITE CONTENTION
NOTES:
1. D
2. All timing is the same for left and right ports. Port “A” may be either left or right port. “B” is the opposite from port “A”.
3. This parameter is measured from R/
4. If t
CE
OR
SPS
= V
= D
is not satisfied, the semaphore will fall positively to one side or the other, but there is no guarantee which side will be granted the semaphore flag.
OUT
IH
A
OL
SEM
for the duration of the above timing (both write and read cycle).
0
R/
-A
VALID" represents all I/O's (I/O
I/O
OE
= V
W
2
SIDE
SIDE
IL
,
CE
(2)
(2)
R
=
CE
“A”
“B”
L
= V
t
VALID ADDRESS
AS
A
A
IH
0"A"
0"B"
. Semaphore flag is released from both sides (reads as ones from both sides) at cycle start.
t
AW
W
SEM
SEM
R/
R/
"A"
-A
-A
Write Cycle
W
W
or
t
2"A"
2"B"
t
0
EW
"A"
"A"
"B"
"B"
WP
-I/O
SEM
7
DATA
) equal to the semaphore value.
VALID
"A"
t
t
DW
going High to R/
WR
IN
t
DH
MATCH
t
SWRD
MATCH
W
"B"
6.06
or
VALID ADDRESS
t
SOP
Read Cycle
SEM
t
SAA
"B"
t
SPS
t
ACE
going High.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
t
AOE
DATA
(1,3,4)
VALID
OUT
2738 drw 12
(2)
t
OH
2738 drw 11
(1)
11

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