IDT7005L Integrated Device Technology, Inc., IDT7005L Datasheet - Page 13

• Manufacturer Part Number: IDT7005L
• Description: High-speed 8k X 8 Dual-port Static RAM
• Manufacturer: Integrated Device Technology, Inc.

IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ WITH
NOTES:
1. To ensure that the earlier of the two ports wins. t
2.
3.
4. If M/
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite port "A".
TIMING WAVEFORM OF WITH WRITE
NOTES:
1. t
2.
3. t
DATA
BUSY
CE
OE
WH
WB
DATA
L
= V
is only for the 'Slave' Version.
ADDR
ADDR
BUSY
S
must be met for both
=
is asserted on Port "B" Blocking R/
R/
= V
OUT "B"
CE
IL
IN "A"
W
R
for the reading port.
IL
"A"
"A"
"B"
"B"
= V
(slave),
IL.
t
BUSY
APS
(1)
BUSY
is an input. Then for this example
BUSY
R/
R/
input (slave) and output (master).
W
W
"A"
"B"
"B"
W
"B", until
APS
BUSY
is ignored for for M/
BUSY
BUSY
BUSY
t
BUSY
BUSY
"B" goes High.
WB
BUSY
(3)
"A"
MATCH
= V
6.06
t
WC
S
IH
t
= V
WP
and
(2)
IL (slave).
BUSY
t
"B"
WP
MILITARY AND COMMERCIAL TEMPERATURE RANGES
input is shown above.
MATCH
t
WDD
t
DW
VALID
t
WH
BUSY
BUSY
BUSY
BUSY
BUSY
2738 drw 14
(1)
t
DDD
(M/S = V
(3)
t
BDA
t
DH
IH
)
(2,4,5)
2738 drw 13
t
BDD
VALID
13