IDT7005L Integrated Device Technology, Inc., IDT7005L Datasheet - Page 8

• Manufacturer Part Number: IDT7005L
• Description: High-speed 8k X 8 Dual-port Static RAM
• Manufacturer: Integrated Device Technology, Inc.

IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
WAVEFORM OF READ CYCLES
NOTES:
1. Timing depends on which signal is asserted last,
2. Timing depends on which signal is de-asserted first,
3. t
4. Start of valid data depends on which timing becomes effective last t
5.
TIMING OF POWER-UP POWER-DOWN
BUSY
SEM
DATA
BUSY
BDD
ADDR
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations
= V
R/
has no relation to valid output data.
OUT
OUT
CE
OE
IH
W
.
I
CE
I
CC
SB
t
t
t
t
(5)
AA
ACE
AOE
LZ
OE
(4)
(1)
(4)
(4)
CE
or
CE
or
.
OE.
t
PU
t
RC
AOE
50%
6.06
, t
t
BDD
ACE
, t
(3, 4)
AA
or t
BDD
.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
VALID DATA
t
PD
2738 drw 08
50%
(4)
t
HZ
(2)
t
OH
2738 drw 07
8