ADP3207 ANALOG DEVICES, ADP3207 Datasheet - Page 16

• Manufacturer Part Number: ADP3207
• Description: 7-Bit Programmable Multiphase Mobile CPU Synchronous Buck Controller
• Manufacturer: ANALOG DEVICES

ADP3207
OUTPUT CROWBAR
To protect the CPU load and output components of the
converter, the PWM outputs are driven low, DCM and OD are
driven high (that is, commanded to turn on the low-side
MOSFETs of all phases) when the output voltage exceeds an
OVP threshold of 1.7 V as specified by IMVP-6.
Turning on the low-side MOSFETs discharges the output
capacitor as soon as reverse current builds up in the inductors.
If the output overvoltage is due to a short of the high-side
MOSFET, then this crowbar action current limits the input
supply or causes the input rail fuse to blow, protecting the
microprocessor from destruction.
Once overvoltage protection (OVP) is triggered, the ADP3207 is
latched off. The latch-off function can be reset by removing and
reapplying VCC, or by recycling EN low and high for a short
time. OVP can be disabled by grounding the TTSENSE pin. The
OVP comparator monitors the output voltage via the CSREF pin.
REVERSE VOLTAGE PROTECTION
Very large reverse currents in inductors can cause negative
V
components. ADP3207 provides reverse voltage protection
(RVP) function without additional system cost. The V
voltage is monitored through the CSREF pin. Any time the
CSREF pin voltage is below −300 mV, the ADP3207 triggers its
RVP function by disabling all PWM outputs and setting both
DCM and OD pins low. Thus, all the MOSFETs are turned off.
The reverse inductor current can be quickly reset to zero by
dumping the energy built up in the inductor into the input dc
voltage source via the forward-biased body diode of the high-
side MOSFETs. The RVP function is terminated when the
CSREF pin voltage returns above −100 mV.
Occasionally, overvoltage crowbar protection results in negative
V
to very large reverse inductor current. To prevent damage of the
CPU by negative voltage, ADP3207 keeps its RVP monitoring
function alive even after OVP latch-off. During OVP latch-off,
if the CSREF pin voltage drops below −300mV, then all low-side
CORE
CORE
voltage, which is harmful to the CPU and other output
voltage, because turn-on of all low-side MOSFETs leads
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MOSFETs are turned off by setting both DCM and OD low.
DCM and OD pins are set high again when CSREF voltage
recovers above −100 mV.
OUTPUT ENABLE AND UVLO
The VCC supply voltage to the controller must be higher than
the UVLO upper threshold, and the EN pin must be higher
than its logic threshold so the ADP3207 can begin switching. If
the VCC voltage is less than the UVLO threshold, or the EN pin
is logic low, then the ADP3207 is in shutdown. In shutdown, the
controller holds the PWM outputs at ground, shorts the SS pin
and PGDELAY pin capacitors to ground, and drives DCM and
OD pins low.
Proper power supply sequencing during start-up and shutdown
of the ADP3207 must be adhered to. All input pins must be at
ground prior to applying or removing VCC. All output pins
should be left in high impedance state while VCC is off.
THERMAL THROTTLING CONTROL
The ADP3207 includes a thermal monitoring circuit to detect if
the temperature of the variable resistor (VR) has exceeded a
user-defined thermal throttling threshold. The thermal
monitoring circuit requires an external resistor divider
connected between the VCC pin and GND. The divider consists
of an NTC thermistor and a resistor. To generate a voltage that
is proportional to temperature, the midpoint of the divider is
connected to the TTSENSE pin. Whenever the temperature
trips the set alarm threshold, an internal comparator circuit
compares the TTSENSE voltage to a half VCC threshold and
outputs a logic level signal at the VRTT output. The VRTT
output is designed to drive an external transistor that, in turn,
provides the high current, open drain VRTT signal that is
required by the IMVP-6 specification. When the temperature is
around the set alarm point, the internal VRTT comparator has
a hysteresis of about 100 mV to prevent high frequency
oscillation of VRTT. The TTSENSE pin also serves the function
of disabling OVP. In extreme heat, users should make sure that
the TTSENSE pin voltage remains above 1 V if OVP is desired.
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