ADP3207 ANALOG DEVICES, ADP3207 Datasheet - Page 23

• Manufacturer Part Number: ADP3207
• Description: 7-Bit Programmable Multiphase Mobile CPU Synchronous Buck Controller
• Manufacturer: ANALOG DEVICES

where:
To meet the conditions of these equations and transient
response, the ESR of the bulk capacitor bank (R
than two times the droop resistance, R
than C
and/or deeper sleep exit specification and can require a smaller
inductor or more phases (the switching frequency can also have
to be increased to keep the output ripple the same).
For example, if using 32 pieces of 10 µF 0805 MLC capacitors
(C
deeper sleep, and V
setting error of 10 mV. Where K = 3.1, solving for the bulk
capacitance yields
Using four 330 µF Panasonic SP capacitors with a typical ESR of
6 mΩ each yields C
One last check should be made to ensure that the ESL of the
bulk capacitors (L
ringing during a load change. This is tested using
where:
Q is limited to the square root of 2 to ensure a critically damped
system.
In this example, L
which satisfies this limitation. If the L
capacitor bank is too large, the number of ceramic capacitors
may need to be increased if there is excessive ringing.
Note that for this multimode control technique, an all-ceramic
capacitor design can be used as long as the conditions of
Equation 13, Equation 14, and Equation 15 are satisfied.
Z
= 320 µF), the fastest VID voltage change is the exit of
C
C
K
⎛
⎜
⎜
⎜
⎝
L
L
x
x
x
X(MAX)
x
=
(
(
1
MIN
≤
≤
MAX
+
−
C
320
1
⎛
⎜
⎜
⎝
)
z
n
)
2 2
≥
⎛
⎜
⎜
⎝
, the system does not meet the VID on-the-fly
×
≤
µ
V
⎛
⎜
⎜
⎜
⎜
⎜ ⎜
⎝
V
R
µ
2
F
ERR
2
O
s
V
×
×
×
2
×
×
X
3
X
(
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
1.
) is low enough to limit the high frequency
1 .
22
Q
2
X
is about 250 pH for the four SP capacitors,
CORE
2
360
1 .
150
2
1 .
2
= 1.32 mF with an R
0
×
mΩ
m
mV
360
nH
(
change is 220 mV in 22 µs with a
V
2
Ω
1 .
)
×
nH
2
+
×
×
m
×
2
36
27
34
220
2
Ω
×
×
0
=
mV
5 .
)
3
34
2
1 .
nH
2
A
mV
×
5 .
nH
×
. 1
⎞
⎟
⎟
⎠
A
2
×
150
1 .
X
. 1
O
m
of the chosen bulk
. If the C
150
V
Ω
X
⎞
⎟
⎟
⎠
V
= 1.5 mΩ.
2
−
−
1
320
X
⎞
⎟
⎟
⎟
⎠
X(MIN)
) should be less
−
µ
320
F
⎞
⎟
⎟
⎟
⎟
⎟ ⎟
⎠
is larger
µ
=
F
1
1 .
=
mF
2
(15)
(16)
Rev. 0 | Page 23 of 32
3 .
mF
POWER MOSFETS
For normal 20 A per phase application, the N-channel power
MOSFETs are selected for two high-side switches and two low-
side switches per phase. The main selection parameters for the
power MOSFETs are V
the gate drive voltage (the supply voltage to the ADP3419) is
5 V, logic-level threshold MOSFETs must be used.
The maximum output current I
requirement for the low-side (synchronous) MOSFETs. In the
ADP3207, currents are balanced between phases; the current in
each low-side MOSFET is the output current divided by the
total number of MOSFETs (n
dominant, the following equation shows the total power
dissipated in each synchronous MOSFET in terms of the ripple
current per phase (I
Knowing the maximum output thermal current and the
maximum allowed power dissipation, users can find the
required R
SOIC compatible packaged MOSFETs, the junction to ambient
(PCB) thermal impedance is 50°C/W. In the worst case, the
PCB temperature is 90°C during heavy load operation of the
notebook; a safe limit for P
temperature. Thus, for this example (32 A maximum thermal
current), R
pieces of low-side MOSFET. This R
temperature of about 120°C; therefore, the R
MOSFET) should be lower than 6.8 mΩ at room temperature,
giving 9.6 mΩ at high temperature.
Another important factor for the synchronous MOSFET is the
input capacitance and feedback capacitance. The ratio of
feedback to input needs to be small (less than 10% is
recommended) to prevent accidental turn-on of the
synchronous MOSFETs when the switch node goes high.
The high-side (main) MOSFET has to be able to handle two
main power dissipation components, conduction and switching
losses. The switching loss is related to the amount of time it
takes for the main MOSFET to turn on and off, and to the
current and voltage that are being switched. Basing the
switching speed on the rise and fall time of the gate driver
impedance and MOSFET input capacitance, Equation 18
provides an approximate value for the switching loss per main
MOSFETs
P
P
SF
S
(
MF
=
)
(
DS(ON)
1
DS(SF)
= 2
−
D
×
)
f
(per MOSFET) is less than 9.6 mΩ for two
×
for the MOSFET. For 8-lead SOIC or 8-lead
SW
⎡
⎢
⎢
⎣
⎛
⎜
⎜
⎝
×
R
n
I
) and average total output current (I
V
SF
O
CC
GS(TH)
n
⎞
⎟
⎟
⎠
2
MF
×
+
I
SF
12
O
1
, Q
is 0.6 W at 120°C junction
SF
×
×
). With conduction losses being
G
R
O
⎛ ×
⎜
⎜
⎝
, C
G
n
determines the R
n
×
ISS
SF
DS(SF)
I
n
R
, C
MF
n
⎞
⎟
⎟
⎠
2
RSS
⎤
⎥
⎥
⎦
is also at a junction
×
×
www.DataSheet4U.com
C
and R
R
ISS
DS
DS(SF)
(
SF
)
DS(ON)
(per
ADP3207
DS(ON)
. Because
O
):
(17)
(18)