ADP3207 ANALOG DEVICES, ADP3207 Datasheet - Page 26

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ADP3207

Manufacturer Part Number
ADP3207
Description
7-Bit Programmable Multiphase Mobile CPU Synchronous Buck Controller
Manufacturer
ANALOG DEVICES
Datasheet

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ADP3207
The first step is to compute the time constants for all of the
poles and zeros in the system
where:
R’ is the PCB resistance from the bulk capacitors to the ceramics.
R
For this example, A
0.4 mΩ (assuming an 8-layer motherboard) and L
for the four Panasonic SP capacitors.
The compensation values can be solved using the following:
The standard values for these components are subject to the
tuning procedure, as introduced in the CIN Selection and Input
Current DI/DT Reduction section.
C
REDUCTION
In continuous inductor-current mode, the source current of the
high-side MOSFET is approximately a square wave with a duty
ratio equal to n × V
maximum output current. To prevent large voltage transients, a
low ESR input capacitor sized for the maximum rms current
must be used. The maximum rms capacitor current happens at
the lowest input voltage, and is given by:
DS
IN
is the total low-side MOSFET on-resistance per phase.
SELECTION AND INPUT CURRENT D
T
T
T
T
R
C
R =
C =
C =
I
I
CRMS
C
CRMS
A
B
D
E
FB
A
A
B
=
=
=
=
=
=
V
C
n
(
C
C
T
R
R
n
T
=
=
T
R
RT
×
X
X
C
B
×
R
B
X
A
D
A
. 0
D
R
×
×
R
×
E
164
+
O
×
(
(
O
C
×
V
R
R
R
+
I
L
R
VID
×
O
X
O
O
'
×
A
T
B
×
×
R
D
D
A
44
OUT
×
A
C
R
O
R
×
2
is 5, V
R
D
Z
'
A
'
)
×
R
)
)
E
n
×
/V
+
×
×
+
DS
×
f
×
C
1
R
R
SW
C
L
R
IN
+
D
X
DS
O
2
X
O
Z
RT
2
and an amplitude of 1-nth the
R
×
×
×
L
= 1. 5 V, R’ is approximately
1
V
R
0.1
×
R
1
O
ID
V
O
R
64
RT
X
R
+
'
1
2
=
×
n
10
L
×
×
3 .
C
(
1
X
A
×
n
R
×
O
I
/D
X
D
×
is 250 pH
V
)
T
×
VID
V
RT
(28)
(29)
(30)
(31)
(32)
(33)
(34)
(35)
(36)
(37)
Rev. 0 | Page 26 of 32
In a typical notebook system, the battery rail decouplings are
MLCC capacitors or a mixture of MLCC capacitors and bulk
capacitors. In this example, the input capacitor bank is formed
by eight pieces of 10 µF, and 25 V MLCC capacitors with a
ripple current rating of about 1.5 A each.
SOFT TRANSIENT SETTING
As described in the Soft Transient section, during the soft
transient, the slew rate of V
controlled by the STSET pin capacitance. Because the timing of
deeper sleep exit is critical, the STSET pin capacitance is set to
satisfy the fast deeper sleep exit slew rate as
where:
8 µA is the source/sink current of the STSET pin.
SLEWRATE
defined as 10 mV/µs in the IMVP-6 specification.
C
SELECTING THERMAL MONITOR COMPONENTS
For single-point hot spot thermal monitoring, simply set R
equal to the NTC thermistor’s resistance at the alarm
temperature (see Figure 12). For example, if the VRTT alarm
temperature is 100°C using a Vishey thermistor (NTHS-
0603N011003J) with a resistance of 100 kΩ at 25°C, and 6.8 kΩ
at 100°C, simply set R
Multiple-point hot spot thermal monitoring can be
implemented as shown in Figure 13. If any of the monitored hot
spots reaches alarm temperature, the VRTT signal is asserted.
The following calculation sets the alarm temperature:
where V
Because the forward current is very small, the forward drop
voltage is very low (100 mV). Assuming the same 100°C alarm
temperature used in the single-spot thermal monitoring example,
and the same Vishay thermistor, then Equation 39 leads to
R
STSET
TTSET
C
R
equals 400 pF, with the closest standard capacitance at 390 pF.
= 7.37 kΩ, whose closest standard resistor is 7.32 kΩ (1%).
STSET
TTSET
FD
1
is the forward drop voltage of the parallel diode.
=
C4E
=
2
Figure 12. Single-Point Thermal Monitoring
½
½
×
VRTT
VRTT
is the voltage slew rate during deeper sleep exit,
ADP3207
ADP3207
+
SLEWRATE
V
V
V
V
REF
REF
8
FD
FD
µ
TTSET1
-
-
+
+
A
R
TH
R
R
R
R
1
ALARMTEMPE
C
CORE
= R
4
E
31
31
30
30
TTSENSE
TTSENSE
TH1
VCC
VCC
reference voltage change is
(100°C) to 6.8 kΩ.
5V
5V
RATURE
R
R
C
C
TTSET1
TTSET1
TT
TT
www.DataSheet4U.com
R
R
TH1
TH1
TTSET1
(38)
(39)

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