ADZS-BF537-EZLITE Analog Devices, ADZS-BF537-EZLITE Datasheet - Page 43

• Manufacturer Part Number: ADZS-BF537-EZLITE
• Description: Specifications: Type: DSP ; Contents: Evaluation Board, Software and Documentation ; For Use With/Related Products: ADSP-BF537 ; Lead Free Status: Lead Free ; RoHS Status: RoHS Compliant
• Manufacturer: Analog Devices

Serial Peripheral Interface Port—Master Timing
Table 34
Table 34. Serial Peripheral Interface (SPI) Port—Master Timing
1
2
3
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
t
t
Applies to all nonautomotive-grade devices when operated within either of these voltage ranges.
Applies to all nonautomotive-grade devices when operated within these voltage ranges.
All automotive-grade devices are within these specifications.
SSPIDM
HSPIDM
SDSCIM
SPICHM
SPICLM
SPICLK
HDSM
SPITDM
DDSPIDM
HDSPIDM
CPHA = 1
CPHA = 0
and
(OUTPUT)
(OUTPUT)
SPIxMOSI
(OUTPUT)
SPIxMISO
SPIxMOSI
(OUTPUT)
SPIxMISO
SPIxSCK
(INPUT)
(INPUT)
Data Input Valid to SCK Edge (Data Input Setup)
SCK Sampling Edge to Data Input Invalid
SPISELx Low to First SCK Edge
Serial Clock High Period
Serial Clock Low Period
Serial Clock Period
Last SCK Edge to SPISELx High
Sequential Transfer Delay
SCK Edge to Data Out Valid (Data Out Delay)
SCK Edge to Data Out Invalid (Data Out Hold)
Figure 24
t
SSPIDM
describe SPI port master operations.
t
SDSCIM
t
HSPIDM
t
SPICLM
Figure 24. Serial Peripheral Interface (SPI) Port—Master Timing
t
SPICHM
t
HDSPIDM
t
HDSPIDM
Rev. I | Page 43 of 68 | July 2010
Min
8.7
–1.5
2 × t
2 × t
2 × t
4 × t
2 × t
2 × t
–1.0
0.80 V V
2.25 V V
ADSP-BF534/ADSP-BF536/ADSP-BF537
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
t
DDSPIDM
–1.5
–1.5
–1.5
–1.5
–1.5
–1.5
t
SPICLK
t
DDSPIDM
DDINT
DDEXT
or
Max
6
0.95 V
2.70 V
t
SSPIDM
1
t
HDSM
Min
7.5
–1.5
2 × t
2 × t
2 × t
4 × t
2 × t
2 × t
–1.0
t
0.95 V V
HSPIDM
2.70 V V
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
–1.5
–1.5
–1.5
–1.5
–1.5
–1.5
t
SPITDM
DDINT
and
DDEXT
Max
6
1.43 V
3.60 V
2, 3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns