ADAV803 Analog Devices, ADAV803 Datasheet - Page 31

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ADAV803

Manufacturer Part Number
ADAV803
Description
Audio Codec
Manufacturer
Analog Devices
Datasheet

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BLOCK REA
The
r
us
b
address is auto
fr
F
in
c
ead from a block of re
locked out on that fra
efore the stop conditi
or a read operation, t
ame and the register
cremented with each
e this feature, the us
ADAV803 provid
(CONTINU
(CONTINUED)
SCL
SDA
ED)
DS AN
maticall
REPEATE
SDA
SCL
BY MA
START BY
MASTER
es the user with th
er has to continue
he register address is a
D START
on. For a write opera
STER
D WRITES
y incremented with each additional
data is written to that r
me.
gisters in one contin
additional frame, and the register d
0
0
0
0
1
1
CHIP ADDRESS BYTE
CHIP ADDRESS BYTE
e ability to write to or
providing data frames
uous operation. To
tion, the register
0
FRAME 3
Figure 54. Reading from the DAC Left Volume Register in I
0
FRAME 1
utomatically
egister address.
0
0
AD1
AD1
AD0
ata is
AD0
Rev. 0 | Page 31 of 56
R/W
R/W
ADAV803
ADAV803
ACK. BY
ACK. BY
Care should be exercised when using the block read or block
write modes. For most cases, block reading or writing to a
register automatically increments the register address to point
to the next register. The exceptions to this case are the indirect
memory address registers, transmitter user bit and receiver user
bit data buffers. Using a block read or write to access these
registers does not update the absolute register address, but
instead updates the buffer address to provide the next value in
the buffer.
D7
1
D6
1
D5
0
REGISTER ADDRESS BYTE
D4
REGISTER DATA
1
2
C
FRAME 4
FRAME 2
D3
0
D2
0
D1
0
D0
X
ADAV803
ACK. BY
ADAV803
ACK. BY
STOP BY
MASTER
ADAV803

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