ADAV803 Analog Devices, ADAV803 Datasheet - Page 6

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ADAV803

Manufacturer Part Number
ADAV803
Description
Audio Codec
Manufacturer
Analog Devices
Datasheet

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ADAV803
Parameter
1
TIMING SPECIFICATIONS
Timing specifications are guaranteed over the full temperature and supply range.
Table 3.
Parameter
MASTER CLOCK AND RESET
I
SERIAL PORTS
2
Guaranteed by design.
C PORT
Power-Down Current
Power Supply Rejection
f
f
t
f
t
t
Start Condition
Stop Condition
Slave Mode
MCLK
XIN
RESET
SCL
SCLH
SCLL
Analog Current
Digital Current
Digital Interface Current
DIRIN/DIROUT Current
PLL Current
Signal at Analog Supply Pins
t
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
SBF
SCS
SCH
DS
SCR
SCF
SDR
SDF
SCS
SBH
SBL
SLS
SLH
SDS
SDH
SDD
1
MCLKI Frequency
XIN Frequency
RESET Low
SCL Clock Frequency
SCL High
SCL Low
Setup Time
Hold Time
Data Setup Time
SCL Rise Time
SCL Fall Time
SDA Rise Time
SDA Fall Time
Setup Time
xBCLK High
xBCLK Low
xBCLK Frequency
xLRCLK Setup
xLRCLK Hold
xSDATA Setup
xSDATA Hold
xSDATA Delay
0.6
10
10
10
10
Min
Min
20
0.6
1.3
0.6
100
40
40
64 × f
10
S
Rev. 0 | Page 6 of 56
Typ
12.288
27
0.6
Typ
18
2.5
700
3.5
900
−70
−70
Max
54
54
400
300
300
300
300
Max
Unit
MHz
MHz
ns
kHz
µs
µs
µs
µs
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
Unit
mA
mA
µA
mA
µA
dB
dB
Comments
Relevant for repeated start condition
After this period, the first clock is generated
To xBCLK rising edge
From xBCLK rising edge
To xBCLK rising edge
From xBCLK rising edge
From xBCLK falling edge
Comments
RESET low, no MCLK
1 kHz, 300 mV p-p
20 kHz, 300 mV p-p

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