MT28C256532W18S Micron Semiconductor Products, Inc., MT28C256532W18S Datasheet - Page 11

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MT28C256532W18S

Manufacturer Part Number
MT28C256532W18S
Description
256Mb Multibank Burst Flash 32Mb/64Mb Async/page Cellularram Combo, 88-Ball Fbga
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
Boot Configurations
in Table 4 below. This table shows the possible config-
urations of the two Flash devices for either top boot or
bottom boot.
Table 4:
MultiChip Packaging Considerations
lenges when controlling complex memory devices.
devices combine two Micron Flash devices with a
single CellularRAM device.
Unique IDs, State Machines, and
Registers
machine (CSM) and status register (SR) and read con-
figuration register (RCR). The RCR settings are sepa-
rate and can be different for the upper and lower
device. Each Flash device has its own OTP , CFI, and
device code. Depending on the boot configuration of
each Flash device, the OTP , CFI, and device code infor-
mation may differ.
register (CR) that defines how the device performs self
refresh.
09005aef80bcd58d
MT28C256564W18S_A.fm - Rev. A, Pub 6/03 EN
CONFIGURATION
Top/Top
Bottom/Top
Top/Bottom
Bottom/Bottom
The possible configurations for Flash die are shown
Multichip packaging presents unique chal-
The MT28C256532W18 and MT28C256564W18
Each Flash device has a separate command state
The CellularRAM device has a refresh configuration
Possible Boot Configurations
for Flash Die
F_CE1#
Bottom
Bottom
Top
Top
32Mb/64Mb ASYNC/PAGE CellularRAM COMBO
ORDER CODE
TT
BT
TB
BB
11
256Mb MULTIBANK BURST FLASH
Command Codes
within each device.
crossing the array boundary between the upper
and lower Flash device and the CellularRAM
device to ensure that only one device is enabled at
one time.
program (0x40/data), it is required that both com-
mands be issued to the same device.
operations occur simultaneously on two devices.
READ Operation
address boundaries of each device. A new page/ burst
operation must be started when crossing a device
boundary.
Flash Reset
Bringing RST# conrol LOW will reset both the
upper and lower device.
Power Consumption
calculations consider the active operation of the
upper and lower Flash device as well as that of the
CellularRAM device. Total power consumed will
be the sum of the currents associated with the
state of each device. Table 10 on page 14 shows the
power consumption specifications.
All Flash command codes are independent
In a two-cycle command sequence such as word
It is not recommended that READ and ERASE
Page and burst read modes are limited to the
The reset control is shared by both Flash die.
Multiple chip packaging requires that power
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Care must be taken when
©2003 Micron Technology. Inc.
ADVANCE

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