PIC12F639 Microchip Technology, PIC12F639 Datasheet - Page 108

• Manufacturer Part Number: PIC12F639
• Description: (PIC12F635 / PIC12F636 / PIC12F639) 8/14-PIN FLASH-BASED / 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY
• Manufacturer: Microchip Technology

PIC12F635/PIC16F636/639
REGISTER 11-2:
REGISTER 11-3:
DS41232B-page 106
bit 8-7
bit 6-1
bit 0
bit 8
bit 7
bit 6-1
bit 0
bit 8
DATOUT<1:0>: LFDATA Output type bit
00 = Demodulated output
01 = Carrier Clock output
10 = RSSI output
11 = RSSI output
LCXTUN<5:0>: LCX Tuning Capacitance bit
000000 =+0 pF (Default)
111111 =+63 pF
R1PAR: Register Parity Bit – set/cleared so the 9-bit register contains odd parity – an odd number of set bits
bit 8
RSSIFET: Pull-down MOSFET on LFDATA pad bit (controllable by user in the RSSI mode only)
1 = Pull-down RSSI MOSFET on
0 = Pull-down RSSI MOSFET off
CLKDIV: Carrier Clock Divide-by bit
1 = Carrier Clock/4
0 = Carrier Clock/1
LCYTUN<5:0>: LCY Tuning Capacitance bit
000000 =+0 pF (Default)
111111 =+63 pF
R2PAR: Register Parity bit – set/cleared so the 9-bit register contains odd parity – an odd number of set bits
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
DATOUT1
RSSIFET
R/W-0
R/W-0
CONFIGURATION REGISTER 1 (ADDRESS: 0001)
CONFIGURATION REGISTER 2 (ADDRESS: 0010)
DATOUT0
CLKDIV
R/W-0
R/W-0
:
:
LCXTUN5
LCYTUN5
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
LCXTUN4
LCYTUN4
R/W-0
R/W-0
Preliminary
LCXTUN3
LCYTUN3
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LCXTUN2
LCYTUN2
R/W-0
R/W-0
LCXTUN1
LCYTUN1
R/W-0
R/W-0
© 2005 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
LCYTUN0
LCXTUN0
R/W-0
R/W-0
R1PAR
R2PAR
R/W-0
R/W-0
bit 0
bit 0