PIC12F639 Microchip Technology, PIC12F639 Datasheet - Page 25
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PIC12F639
Manufacturer Part Number
PIC12F639
Description
(PIC12F635 / PIC12F636 / PIC12F639) 8/14-PIN FLASH-BASED / 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY
Manufacturer
Microchip Technology
Datasheet
1.PIC12F639.pdf
(196 pages)
- Current page: 25 of 196
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2.2.2.4
The PIE1 register contains the interrupt enable bits, as
shown in Register 2-4.
REGISTER 2-4:
© 2005 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIE1 Register
PIE1 — PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS: 8Ch)
bit 7
EEIE: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
LVDIE: Low-Voltage Detect Interrupt Enable bit
1 = Enables the LVD interrupt
0 = Disables the LVD interrupt
CRIE: Cryptographic Interrupt Enable bit
1 = Enables the cryptographic interrupt
0 = Disables the cryptographic interrupt
C2IE: Comparator 2 Interrupt Enable bit
1 = Enables the Comparator 2 interrupt
0 = Disables the Comparator 2 interrupt
C1IE: Comparator 1 Interrupt Enable bit
1 = Enables the Comparator 1 interrupt
0 = Disables the Comparator 1 interrupt
OSFIE: Oscillator Fail Interrupt Enable bit
1 = Enables the oscillator fail interrupt
0 = Disables the oscillator fail interrupt
Unimplemented: Read as ‘0’
TMR1IE: Timer1 Interrupt Enable bit
1 = Enables the Timer1 interrupt
0 = Disables the Timer1 interrupt
Legend:
R = Readable bit
- n = Value at POR
R/W-0
Note 1: PIC16F636/639 only.
EEIE
R/W-0
LVDIE
R/W-0
PIC12F635/PIC16F636/639
CRIE
Preliminary
W = Writable bit
‘1’ = Bit is set
C2IE
R/W-0
(1)
Note:
(1)
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
C1IE
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
OSFIE
R/W-0
x = Bit is unknown
U-0
—
DS41232B-page 23
TMR1IE
R/W-0
bit 0
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