MT9075B Mitel Networks Corporation, MT9075B Datasheet - Page 32

no-image

MT9075B

Manufacturer Part Number
MT9075B
Description
E1 Single Chip Transceiver
Manufacturer
Mitel Networks Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT9075BL
Quantity:
5 510
Part Number:
MT9075BL
Manufacturer:
ZARLINK
Quantity:
490
Part Number:
MT9075BL
Manufacturer:
ZARLINK
Quantity:
20 000
Part Number:
MT9075BL1
Manufacturer:
ZARLINK
Quantity:
5
Part Number:
MT9075BP
Manufacturer:
MT
Quantity:
1 000
Part Number:
MT9075BP
Manufacturer:
MITEL
Quantity:
199
Part Number:
MT9075BP
Manufacturer:
ZARLINK
Quantity:
20 000
MT9075B
32
Table 16 - Transmit MF Alignment Signal
1 - 0
7 -4
Bit
3
2
TMA1-4
X2, X3
Name
(11)
(0)
X1
(1)
(1)
Y
(Page 01H, Address 13H)
Transmit Multiframe Alignment
Bits One to Four. These bits are
transmitted on the PCM 30 2048
kbit/sec. link in bit positions one to
four of time slot 16 of frame zero of
every signalling multiframe. These
bits are used by the far end to
identify
signalling multiframe. TMA1-4 =
0000 for normal operation.
This bit is transmitted on the PCM
30 2048 kbit/sec. link in bit position
five of time slot 16 of frame zero of
every multiframe. X1 is normally
set to one.
This bit is transmitted on the PCM
30 2048 kbit/sec. link in bit position
six of time slot 16 of frame zero of
every multiframe. It is used to
indicate the loss of multiframe
alignment to the remote end of the
link. If one - loss of multiframe
alignment; if zero - multiframe
alignment acquired. This bit is
ignored when AUTY is zero (page
01H, address 11H).
These bits are transmitted on the
PCM 30 2048 kbit/sec. link in bit
positions
respectively, of time slot 16 of
frame zero of every multiframe. X2
and X3 are normally set to one.
Functional Description
specific
seven
frames
and
of
eight
a
4-0
Bit
7
6
5
RxTRSP
HDLC0
HDLC1
Name
(0)
(0)
(0)
---
Table 17 - HDLC Selection Word
(Page 01H, Address 14H)
HDLC0 Select. If one, then HDLC0
is connected to the data link on
selected S
16 or 20 kbits/sec. If zero, HDLC0 is
deselected and all HDLC0 interrupts
are masked.
HDLC1 Select. If one, then HDLC1
is connected to time slot 16 in CCS
mode. If zero, HDLC1 is deselected
and
masked.
Receive Transparent Mode. When
this bit is set to one, the framing
function is disabled on the receive
side. Data coming from the receive
line passes through the slip buffer
and drives DSTo with an arbitrary
alignment. When zero, the receive
framing function operates normally.
Unused.
Preliminary Information
Functional Description
all
a
HDLC1
bits at a rate of 4, 8, 12,
interrupts
are

Related parts for MT9075B