87C196JV Intel Corporation, 87C196JV Datasheet - Page 34

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87C196JV

Manufacturer Part Number
87C196JV
Description
ADVANCED 16-BIT CHMOS MICROCONTROLLER
Manufacturer
Intel Corporation
Datasheet
87C196KR, JV, JT, JR, CA Microcontrollers — Automotive
34
P1_PIN.x
P1_REG.x
P1_DIR.x
P1_MODE.x
NOTE: Writing to these bits will have no effect.
2. V
3. ONCE Mode
4. Port0
5. Port1
6. Port2
Register Bits
The DC Characteristics section of the Automotive KR datasheet contains a parameter, V
(Output High Voltage in RESET (BD ports)), which is specified at V
I
active during and after reset. These weak pull-ups stay active until the user writes to PxMODE
(previously known as PxSSEL) and configures the port pin as desired.
These pull-ups do not meet this V
ports have been enhanced to meet the published specification of I
ONCE mode is entered by holding a single pin low on the rising edge of RESET#. On the KR,
this pin is P5.4/SLPINT. The JR-C does not support ONCE mode since P5.4/SLPINT (ONCE
mode entry pin) is not bonded-out on these devices. To provide ONCE mode on the JR-D, the
ONCE mode entry function was moved from P5.4/SLPINT to P2.6/HLDA. This will allow the
JR-D to enter ONCE mode using P2.6 instead of removed pin P5.4.
On the JR-C, P0.0 and P0.1 are not bonded out. However, these inputs are present in the
device and reading them will provide an indeterminate result.
On the JR-D, the analog inputs for these two channels at the multiplexer are tied to V
Therefore, initiating an analog conversion on ACH0 or ACH1 will result in a value equal to
full scale (3FFh). On the JR-D, the digital inputs for these two channels are tied to ground,
therefore reading P0.0 or P0.1 will result in a digital ``0''.
On the JR-C, P1.4, P1.5, P1.6 and P1.7 are not bonded out but are present internally on the
device. This allows the programmer to write to the port registers and clear, set or read the pin
even though it is not available to the outside world. However, to maintain compatibility with
D-step and future devices, it is recommended that the corresponding bits associated with the
removed pins NOT be used to conditionally branch in software. These bits should be treated as
reserved.
On the JR-D, unused port logic for these four port pins has been removed from the device and
is not available to the programmer. Corresponding bits in the port registers have been ``hard-
wired'' to provide the following results when read:
On the JR-C, P2.3 and P2.5 are not bonded out but are present internally on the device. This
allows the programmer to write to the port registers and clear, set or read the pin even though
it is not available to the outside world. However, to maintain compatibility with D-step and
future devices, it is recommended that the corresponding bits associated with the removed pins
not be used to conditionally branch in software. These bits should be treated as reserved.
On the JR-D, unused port logic for these two port pins has been removed from the device and
is not available to the programmer. Corresponding bits in the port registers have been
“hardwired” to provide the following results when read:
OH2
OH2
= –15 µA. This specification indicates the strength of the internal weak pull-ups that are
Strengthened
(x = 4,5,6,7)
(x = 4,5,6,7)
(x = 4,5,6,7)
(x = 4,5,6,7)
OH2
spec on the JR-C. The weak pull-ups on specified JR-D
When Read
1
1
1
0
OH2
CC
= –15 µ A.
– 1 V min at
Datasheet
REF
OH2
.

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