RB5C396 Ricoh Corporation, RB5C396 Datasheet - Page 39
RB5C396
Manufacturer Part Number
RB5C396
Description
PC Card Controller Compliant With Pcmcia 2.1/jeida 4.2
Manufacturer
Ricoh Corporation
Datasheet
1.RB5C396.pdf
(93 pages)
- Current page: 39 of 93
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1.9 Card Status Interrupt Configuration Register
Index : 05h
bit7 to bit4 : These bits select the redirection of the card status change interrupt if the interrupt is not selected to
bit3
bit2
bit1
bit0
INTR# Enable bit
0
0
0
0
0
0
0
0
0
0
0
1
: Card Detect Enable. Setting bit to “1” enables a card status change interrupt when a change has been
: Ready Enable. Setting this bit to “1” enables a card status change interrupt when a “L” to “H” transition
: Battery Warning Enable. Setting this bit to “1” enables a card status change interrupt when battery
: Battery Dead Enable. For memory cards, Setting this bit to “1” enables a card status change interrupt
INTR# pin.
detected on CD1# or CD2# signals.
has been detected on READY/BUSY# signals. This bit is ignored when interface is configured for I/O
card.
warning condition has been detected. This bit is ignored when interface is configured for I/O card.
when a battery dead condition has been detected. For I/O cards, a card status change interrupt will be
generated if the STSCHG#/RI# has been pulled “L” assuming Ring Indicate Enable Bit (bit7) in
Interrupt and General Control Register is set to “0”.
Default value : 0000 0000b
bit3
´
0
0
0
0
0
1
1
1
1
1
1
bit2
´
0
0
1
1
1
0
0
0
1
1
1
Read & Write
bit1
´
0
1
0
0
1
0
1
1
0
1
1
RF5C296/RF5C396L/RB5C396/RF5C396
bit0
´
0
1
0
1
1
1
0
1
0
0
1
redirected to INTR#
IRQ not Selected
IRQn Selection
IRQ10 Enabled
IRQ11 Enabled
IRQ12 Enabled
IRQ14 Enabled
IRQ15 Enabled
IRQ3 Enabled
IRQ4 Enabled
IRQ5 Enabled
IRQ7 Enabled
IRQ9 Enabled
35
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