RB5C396 Ricoh Corporation, RB5C396 Datasheet - Page 72

• Manufacturer Part Number: RB5C396
• Description: PC Card Controller Compliant With Pcmcia 2.1/jeida 4.2
• Manufacturer: Ricoh Corporation

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5.4 5VDET/GPI Pin
use. Further, it can also be connected to the VS1# pin on the PC card slot to detect the 5V PC card. (For details, see
“3.2 5VDET/GPI and VS1# Pins” in “3. Connections to PCMCIA Slot” in “HARDWARE DESIGN CONSIDERA-
TIONS”.)
· Interface Status Register (Index : 01h) : bit7
· Card Status Change Register (Index : 04h) : bit4 (GPI Change Bit)
· Card Detect and General Control Register (Index : 16h) : bit3 (GPI Transmission Control Bit)
· Card Detect and General Control Register (Index : 16h) : bit2 (GPI Enable Bit)
5.5 READY#/BUSY# Pins
tion that the PC card is the memory card.
· Interface Status Register (Index : 01h) : bit5 (Ready/Busy# Bit)
· Card Status Change Register (Index : 04h) : bit2 (Ready Change Bit)
· Card Status Interrupt Configuration Register (Index : 05h) : bit2 (Ready Enable Bit)
RF5C296/RF5C396L/RB5C396/RF5C396
The GPI pin, as its full name “general-purpose input pin” suggests, functions as an input pin for general purpose
The internal registers described below function as those relating to the READY#/BUSY# pin status on the condi-
This bit can be used to specify reading back the 5VDET/GPI pin.
This bit will be set to “1” upon generation of interrupts derived from the GPI pin status change when bit2
(GPI Enable Bit) is set to “1” in the Card Detect and General Control Register (Index : 16h).
This bit can be set to “1” and “0” to specify generation of interrupts upon transition of the GPI pin from “H” to
“L” and vice versa, respectively.
This bit can be used to enable interrupts from the GPI pin and set to “1” to specify generation of interrupts
upon the GPI input status change.
This bit can be set to “0” and “1” to specify reading back the READY#/BUSY# pins, respectively (specify read-
ing back the IREQ# pin when the PC card is the I/O card).
This bit will be set to “1” upon transition of the READY#/BUSY# pins from “L” to “H”.
This bit can be set to “1” to specify generation of interrupts upon transition of the READY#/BUSY# pins from
“L” to “H”.