RB5C396 Ricoh Corporation, RB5C396 Datasheet - Page 47

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RB5C396

Manufacturer Part Number
RB5C396
Description
PC Card Controller Compliant With Pcmcia 2.1/jeida 4.2
Manufacturer
Ricoh Corporation
Datasheet
5.4 Card I/O Offset Address 1 High Byte Register
Index : 39h
bit7 : offset address 15
bit6 : offset address 14
bit5 : offset address 13
bit4 : offset address 12
bit3 : offset address 11
bit2 : offset address 10
bit1 : offset address 9
bit0 : offset address 8
5.5 Chip Identification Register (Read Only)
Index : 3Ah
5.6 Mode Control Register 3
Index : 3Bh
bit7 to bit2 : Reserved.
bit1
bit0
Output
Input
: DMA Mode Enable Bit.
: PCMCIA Interface Disable Bit.
If this bit is set to “1”, signals shown in the below table are set to “Z”, all PCMCIA interface signals are
disabled and become “Z”. The built-in pull-down resistor is disabled for data bus signals. Slot output sig-
nals will be caused to transition to high impedance even when bit 0 is set in the Power and RESETDRV
Control Register.
When this bit is set to “1”, the DMA Mode is selected in which DMA-related signals are redefined as
described in “DMA Mode”. This bit defaults to “0”. This bit cannot be set to “1” simultaneously for
Slot #0 and Slot #1.
Default value : 0000 0000b
Default value : 0000 0000b
Default value : 32h (RF5C296), B2h (RF5C396)
Read only register, 32h is read back from RF5C296, B2h is read back from RF5C396.
CD1#, CD2#, BVD1, BVD2, RDY/BSY#, WAIT#, WP, INPACK#
CA[25 : 0], CD[15 : 0], CE1#, CE2#, CIORD#, CIOWR#, OE#, REG#, RESET, WE#
Read & Write
Read & Write
RF5C296/RF5C396L/RB5C396/RF5C396
Read Only
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