LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 101
LM3S2110-IQN20-A0
Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S2110-IQN20-A0.pdf
(485 pages)
- Current page: 101 of 485
- Download datasheet (5Mb)
November 29, 2007
Bit/Field
3
2
1
0
GPIOD
GPIOC
GPIOB
GPIOA
Name
Type
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Preliminary
Description
Port D Clock Gating Control
This bit controls the clock gating for Port D. If set, the unit receives a
clock and functions. Otherwise, the unit is unclocked and disabled. If
the unit is unclocked, reads or writes to the unit will generate a bus fault.
Port C Clock Gating Control
This bit controls the clock gating for Port C. If set, the unit receives a
clock and functions. Otherwise, the unit is unclocked and disabled. If
the unit is unclocked, reads or writes to the unit will generate a bus fault.
Port B Clock Gating Control
This bit controls the clock gating for Port B. If set, the unit receives a
clock and functions. Otherwise, the unit is unclocked and disabled. If
the unit is unclocked, reads or writes to the unit will generate a bus fault.
Port A Clock Gating Control
This bit controls the clock gating for Port A. If set, the unit receives a
clock and functions. Otherwise, the unit is unclocked and disabled. If
the unit is unclocked, reads or writes to the unit will generate a bus fault.
LM3S2110 Microcontroller
101
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