LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 133
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LM3S2110-IQN20-A0
Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S2110-IQN20-A0.pdf
(485 pages)
- Current page: 133 of 485
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Flash Memory Protection Program Enable 3 (FMPPE3)
Base 0x400F.E000
Offset 0x40C
Type R/W, reset 0x0000.0000
November 29, 2007
Reset
Reset
Type
Type
Bit/Field
31:0
R/W
R/W
31
15
0
0
Register 18: Flash Memory Protection Program Enable 3 (FMPPE3), offset
0x40C
Note:
This register stores the execute-only protection bits for each 2-KB flash block (FMPREn stores the
execute-only bits). This register is loaded during the power-on reset sequence. The factory settings
for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves
a policy of open access and programmability. The register bits may be changed by writing the
specific register bit. However, this register is R/W0; the user can only change the protection bit from
a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is
committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0
and not committed, it may be restored by executing a power-on reset sequence. For additional
information, see the "Flash Memory Protection" section.
R/W
R/W
30
14
PROG_ENABLE
0
0
Name
Offset is relative to System Control base address of 0x400FE000.
R/W
R/W
29
13
0
0
R/W
R/W
28
12
0
0
R/W
R/W
Type
27
11
R/W
0
0
R/W
R/W
26
10
0
0
0x00000000
Reset
R/W
R/W
25
0
9
0
Preliminary
PROG_ENABLE
PROG_ENABLE
Description
Flash Programming Enable
Configures 2-KB flash blocks to be execute only. The policies may be
combined as shown in the table “Flash Protection Policy Combinations”.
R/W
R/W
Value
0x00000000
24
0
8
0
R/W
R/W
23
0
7
0
Description
Enables 64 KB of flash.
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
LM3S2110 Microcontroller
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0
133
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