LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 138

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LM3S2110-IQN20-A0

Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
General-Purpose Input/Outputs (GPIOs)
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
Table 8-2. GPIO Interrupt Configuration Example
a. X=Ignored (don’t care bit)
8.3
138
Configuration
Digital Input (Timer
CCP)
Digital Output (PWM)
Digital Output (Timer
PWM)
Digital Input/Output
(SSI)
Digital Input/Output
(UART)
Analog Input
(Comparator)
Digital Output
(Comparator)
Register
GPIOIS
GPIOIBE
GPIOIEV
GPIOIM
Desired
Interrupt
Event
Trigger
0=Low level,
1=High level,
or negative
0=masked
Register Map
Table 8-3 on page 139 lists the GPIO registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that GPIO port’s base address:
or positive
0=single
masked
0=edge
1=level
1=both
edges
1=not
edge
edge
edge
GPIO Port A: 0x4000.4000
GPIO Port B: 0x4000.5000
GPIO Port C: 0x4000.6000
GPIO Register Bit Value
AFSEL
1
1
1
1
1
0
1
Pin 2 Bit Value
7
X
X
X
0
DIR
X
X
X
X
X
X
0
6
a
ODR
X
X
X
0
a
0
0
0
0
0
0
0
5
DEN
X
X
X
0
Preliminary
1
1
1
1
1
0
1
PUR
4
?
?
?
?
?
0
?
X
X
X
0
PDR
3
?
?
?
?
?
0
?
X
X
X
0
DR2R
X
X
?
?
?
?
?
2
0
0
1
1
DR4R
X
X
?
?
?
?
?
1
November 29, 2007
DR8R
X
X
X
0
X
X
?
?
?
?
?
0
SLR
X
X
X
0
X
X
?
?
?
?
?

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